- First stab at running linuxbios without the old static device tree.

Things are close but not quite there yet.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1681 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/arch/i386/init/crt0.S.lb

@@ -37,12 +37,21 @@
 
 #include "crt0_includes.h"
 
+	/* uses:	 esp, ebx, ax, dx */
+#define __CONSOLE_TX_STRING(string)	\
+	mov	string, %ebx	; \
+	CALLSP(console_tx_string)
+
+#if ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG
+#define CONSOLE_DEBUG_TX_STRING(string)        __CONSOLE_TX_STRING(string)
+#else
+#define CONSOLE_DEBUG_TX_STRING(string)
+#endif
 
 	/* clear boot_complete flag */
 	xorl	%ebp, %ebp
 __main:
-	mov	$str_copying_to_ram, %ebx
+	CONSOLE_DEBUG_TX_STRING($str_copying_to_ram)
-	CALLSP(console_tx_string)
 
 	/*
 	 *	Copy data into RAM and clear the BSS. Since these segments
@@ -149,8 +158,7 @@ decompr_end_n2b:
 	movl	%esp, %ebp
 #endif
 
-	mov	$str_pre_main, %ebx
+	CONSOLE_DEBUG_TX_STRING($str_pre_main)
-	CALLSP(console_tx_string)
 	leal	_iseg, %edi
 	jmp	%edi
 
@@ -159,12 +167,9 @@ decompr_end_n2b:
 	hlt
 	jmp	.Lhlt
 
-
+#if ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG
 	/* Uses esp, ebx, ax, dx  */
 console_tx_string:
-#if ASM_CONSOLE_LOGLEVEL <= BIOS_DEBUG
-	RETSP
-#else	
 	mov	(%ebx), %al
 	inc	%ebx
 	cmp	$0, %al
@@ -210,4 +215,3 @@ str_pre_main:        .string "Jumping to LinuxBIOS.\r\n"
 .previous
 
 #endif /* ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG */
-	

src/arch/i386/smp/mpspec.c

@@ -1,4 +1,6 @@
 #include <console/console.h>
+#include <device/device.h>
+#include <device/path.h>
 #include <cpu/cpu.h>
 #include <arch/smp/mpspec.h>
 #include <string.h>
@@ -101,14 +103,17 @@ void smp_write_processors(struct mp_config_table *mc)
 	unsigned cpu_feature_flags;
 	struct cpuid_result result;
 	device_t cpu;
+	
 	boot_apic_id = lapicid();
 	apic_version = lapic_read(LAPIC_LVR) & 0xff;
 	result = cpuid(1);
 	cpu_features = result.eax;
 	cpu_feature_flags = result.edx;
-	for(cpu = dev_root.link[1].children; cpu; cpu = cpu->sibling) {
+	for(cpu = all_devices; cpu; cpu = cpu->next) {
 		unsigned long cpu_flag;
-		if (cpu->path.type != DEVICE_PATH_APIC) {
+		if ((cpu->path.type != DEVICE_PATH_APIC) || 
+			(cpu->bus->dev->path.type != DEVICE_PATH_APIC_CLUSTER))
+		{
 			continue;
 		}
 		if (!cpu->enabled) {

src/boot/hardwaremain.c

@@ -32,7 +32,6 @@ it with the version available from LANL.
 #include <boot/tables.h>
 #include <device/device.h>
 #include <device/pci.h>
-#include <device/chip.h>
 #include <delay.h>
 #include <stdlib.h>
 #include <part/hard_reset.h>
@@ -52,8 +51,6 @@ void hardwaremain(int boot_complete)
 
 	post_code(0x80);
 
-	CONFIGURE(CONF_PASS_PRE_CONSOLE);
-
 	/* displayinit MUST PRECEDE ALL PRINTK! */
 	console_init();
 	
@@ -69,13 +66,13 @@ void hardwaremain(int boot_complete)
 		hard_reset();
 	}
 
-	CONFIGURE(CONF_PASS_PRE_PCI);
+	/* FIXME: Is there a better way to handle this? */
+	init_timer(); 
 
 	/* pick how to scan the bus. This is first so we can get at memory size. */
 	printk_info("Finding PCI configuration type.\n");
 	pci_set_method();
 	post_code(0x5f);
-	enumerate_static_devices();
 	dev_enumerate();
 	post_code(0x66);
 	/* Now do the real bus.
@@ -90,15 +87,11 @@ void hardwaremain(int boot_complete)
 	dev_initialize();
 	post_code(0x89);
 
-	CONFIGURE(CONF_PASS_POST_PCI);
-
 	/* Now that we have collected all of our information
 	 * write our configuration tables.
 	 */
 	lb_mem = write_tables();
 
-	CONFIGURE(CONF_PASS_PRE_BOOT);
-
 #if CONFIG_FS_STREAM == 1
 	filo(lb_mem);
 #else

src/cpu/amd/model_fxx/model_fxx_init.c

@@ -3,7 +3,6 @@
 #include <cpu/x86/msr.h>
 #include <cpu/amd/mtrr.h>
 #include <device/device.h>
-#include <device/chip.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <string.h>

src/cpu/amd/socket_940/chip.h

@@ -1,4 +1,4 @@
-extern struct chip_control cpu_amd_socket_940_control;
+extern struct chip_operations cpu_amd_socket_940_ops;
 
 struct cpu_amd_socket_940_config {
 };

src/cpu/amd/socket_940/socket_940.c

@@ -1,7 +1,7 @@
-#include <device/chip.h>
+#include <device/device.h>
 #include "chip.h"
 
 
-struct chip_control cpu_amd_socket_940_control = {
+struct chip_operations cpu_amd_socket_940_ops = {
 	.name = "socket 940",
 };

src/cpu/intel/model_6xx/model_6xx_init.c

@@ -1,6 +1,5 @@
 #include <console/console.h>
 #include <device/device.h>
-#include <device/chip.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <string.h>

src/cpu/intel/model_f0x/model_f0x_init.c

@@ -1,6 +1,5 @@
 #include <console/console.h>
 #include <device/device.h>
-#include <device/chip.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <string.h>

src/cpu/intel/model_f1x/model_f1x_init.c

@@ -1,6 +1,5 @@
 #include <console/console.h>
 #include <device/device.h>
-#include <device/chip.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <string.h>

src/cpu/intel/model_f2x/model_f2x_init.c

@@ -1,6 +1,5 @@
 #include <console/console.h>
 #include <device/device.h>
-#include <device/chip.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <string.h>

src/cpu/intel/model_f3x/model_f3x_init.c

@@ -1,6 +1,5 @@
 #include <console/console.h>
 #include <device/device.h>
-#include <device/chip.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <string.h>

src/cpu/intel/slot_2/slot_2.c

@@ -1,4 +1,4 @@
-#include <device/chip.h>
+#include <device/device.h>
 #include "chip.h"
 
 

src/cpu/intel/socket_mPGA603/socket_mPGA603_400Mhz.c

@@ -1,4 +1,4 @@
-#include <device/chip.h>
+#include <device/device.h>
 #include "chip.h"
 
 

src/cpu/intel/socket_mPGA604_533Mhz/socket_mPGA604_533Mhz.c

@@ -1,4 +1,4 @@
-#include <device/chip.h>
+#include <device/device.h>
 #include "chip.h"
 
 

src/cpu/intel/socket_mPGA604_800Mhz/socket_mPGA604_800Mhz.c

@@ -1,4 +1,4 @@
-#include <device/chip.h>
+#include <device/device.h>
 #include "chip.h"
 
 

src/cpu/simple_init/simple_cpu_init.c

@@ -7,7 +7,7 @@
 #error "This Configuration does not support SMP"
 #endif
 
-void initialize_cpus(device_t root)
+void initialize_cpus(struct bus *cpu_bus)
 {
 	struct device_path cpu_path;
 	struct cpu_info *info;
@@ -19,7 +19,7 @@ void initialize_cpus(device_t root)
 	cpu_path.type = DEVICE_PATH_BOOT_CPU;
 
 	/* Find the device struct for the boot cpu */
-	info->cpu = alloc_find_dev(root->link[1], &cpu_path);
+	info->cpu = alloc_find_dev(bus, &cpu_path);
 	
 	/* Initialize the bootstrap processor */
 	cpu_initialize();

src/cpu/x86/lapic/lapic_cpu_init.c

@@ -234,12 +234,12 @@ void secondary_cpu_init(void)
 	stop_this_cpu();
 }
 
-static void initialize_other_cpus(device_t root)
+static void initialize_other_cpus(struct bus *cpu_bus)
 {
 	int old_active_count, active_count;
 	device_t cpu;
 	/* Loop through the cpus once getting them started */
-	for(cpu = root->link[1].children; cpu ; cpu = cpu->sibling) {
+	for(cpu = cpu_bus->children; cpu ; cpu = cpu->sibling) {
 		if (cpu->path.type != DEVICE_PATH_APIC) {
 			continue;
 		}
@@ -267,7 +267,7 @@ static void initialize_other_cpus(device_t root)
 		udelay(10);
 		active_count = atomic_read(&active_cpus);
 	}
-	for(cpu = root->link[1].children; cpu; cpu = cpu->sibling) {
+	for(cpu = cpu_bus->children; cpu; cpu = cpu->sibling) {
 		if (cpu->path.type != DEVICE_PATH_APIC) {
 			continue;
 		}
@@ -284,7 +284,7 @@ static void initialize_other_cpus(device_t root)
 #define initialize_other_cpus(root) do {} while(0)
 #endif /* CONFIG_SMP */
 
-void initialize_cpus(device_t root)
+void initialize_cpus(struct bus *cpu_bus)
 {
 	struct device_path cpu_path;
 	struct cpu_info *info;
@@ -305,12 +305,12 @@ void initialize_cpus(device_t root)
 #endif
 	
 	/* Find the device structure for the boot cpu */
-	info->cpu = alloc_find_dev(&root->link[1], &cpu_path);
+	info->cpu = alloc_find_dev(cpu_bus, &cpu_path);
 	
 	/* Initialize the bootstrap processor */
 	cpu_initialize();
 
 	/* Now initialize the rest of the cpus */
-	initialize_other_cpus(root);
+	initialize_other_cpus(cpu_bus);
 }
 

src/devices/Config.lb

@@ -4,4 +4,3 @@ object device_util.o
 object pci_device.o
 object pnp_device.o
 object hypertransport.o
-object chip.o

src/devices/chip.c

@@ -1,232 +0,0 @@
-/* chips are arbitrary chips (superio, southbridge, etc.)
- * They have private structures that define chip resources and default 
- * settings. They have four externally visible functions for control. 
- * They have a generic component which applies to all chips for 
- * path, etc. 
- */
-
-#include <console/console.h>
-#include <device/chip.h>
-#include <device/pci.h>
-
-/**
- * @brief Configure static devices
- *
- * Starting from the static device 'root', walk the tree and configure each
- * device by calling the device specific chip_control::enable().
- *
- * This function is only an iterator, the exact definition of 'configure'
- * depends on the device specific implementation of chip_control::enable(). 
- *
- * @param root root of the static device tree to be configured.
- * @param pass pass of the configuration operation to be perfromed.
- *
- * @see chip_pass
- * @see chip_control::enable
- */  
-void chip_configure(struct chip *root, enum chip_pass pass)
-{
-	struct chip *c;
-
-	for (c = root; c; c = c->next) {
-		if (c->control && c->control->enable)
-			c->control->enable(c, pass);
-	}
-
-	for (c = root; c; c = c->next) {
-		if (c->children)
-			chip_configure(c->children, pass);
-	}
-}
-
-/**
- * @brief Convert static device structures to dynamic structures.
- *
- * A static device may contain one or more dynamic devices. Dynamic device
- * structures of these devices have to be generated before the enumeration
- * of dynamic devices. This function converts a static chip structure to a
- * set of dynamic device structures.
- *
- * This function is the generic method called by enumerate_static_device_chain()
- * for static devices. Devices extend this default behavior by defining their
- * own chip_controll::enumerate(). Generally, device specific
- * chip_control::enumerate() method calls this function as its last operation.
- *
- * @param chip static chip structure to be converted.
- *
- */
-void chip_enumerate(struct chip *chip)
-{
-	struct chip *child;
-	device_t dev;
-	int link;
-	int i;
-
-	dev = 0;
-	link = 0;
-
-	if (chip->control && chip->control->name) {
-		printk_debug("Enumerating: %s\n", chip->control->name);
-	}
-
-	for(i = 0; i < MAX_CHIP_PATHS; i++) {
-		int identical_paths;
-		identical_paths = 
-			(i > 0) &&
-			(path_eq(&chip->path[i - 1].path, &chip->path[i].path));
-		if (!identical_paths) {
-			struct bus *parent;
-			int bus;
-			link = 0;
-			dev = 0;
-			parent = chip->bus;
-			switch(chip->path[i].path.type) {
-			case DEVICE_PATH_NONE:
-				/* no dynamic device associated */
-				break;
-			case DEVICE_PATH_PCI:
-				bus = chip->path[i].path.u.pci.bus;
-				if (bus != 0) {
-					device_t dev;
-					int i = 1;
-					dev = chip->dev;
-					while(dev && (i != bus)) {
-						dev = dev->next;
-						i++;
-					}
-					if ((i == bus) && dev) {
-						parent = &dev->link[0];
-					}
-				}
-				/* Fall through */
-			default:
-				dev = alloc_dev(parent, &chip->path[i].path);
-				break;
-			}
-		}
-		else {
-			link += 1;
-		}
-
-		if (dev) {
-			struct chip_resource *res, *res_limit;
-			printk_spew("path (%p) %s %s", 
-				dev, dev_path(dev), identical_paths?"identical":"");
-			printk_spew(" parent: (%p):%d %s\n",
-				dev->bus->dev,  dev->bus->link,
-				dev_path(dev->bus->dev));
-			dev->chip = chip;
-			dev->enabled = chip->path[i].enabled;
-			dev->links = link + 1;
-			for(child = chip->children; child; child = child->next) {
-				if (!child->bus && child->link == i) {
-					child->bus = &dev->link[link];
-				}
-			}
-			res = &chip->path[i].resource[0];
-			res_limit = &chip->path[i].resource[MAX_RESOURCES];
-			for(; res < res_limit; res++) {
-				if (res->flags) {
-					struct resource *resource;
-					resource = new_resource(dev, res->index);
-					resource->flags = res->flags | IORESOURCE_FIXED | IORESOURCE_ASSIGNED;
-					resource->base = res->base;
-				}
-			}
-		}
-
-		if (dev && !chip->dev) {
-			chip->dev = dev;
-		}
-	}
-	if (chip->children && !chip->dev) {
-		die("No device but children?");
-	}
-	for(child = chip->children; child; child = child->next) {
-		if (!child->bus) {
-			child->bus = &chip->dev->link[0];
-		}
-	}
-}
-
-/**
- * @brief Enumerate a static device tree.
- *
- * A static device chain is a linked list of static device structures which are
- * on the same branch of the static device tree. This function does not only
- * enumerate the devices on a single chain, as its name suggest, it also walks
- * into the subordinary chains by recursion. It calls the device specific
- * chip_control::enumerate() of the device if one exists or calls the generic
- * chip_enumerate(). 
- *
- * This function is only an iterator, the exact definition of 'enumerate'
- * depends on the implementation of the generic chip_enumerate() and/or device
- * specific chip_control::enumerate(). 
- *
- * @param root static chip structure to start with.
- *
- * @see chip_control::enumerate()
- */
-static void enumerate_static_device_chain(struct chip *root)
-{
-	struct chip *chip;
-	for(chip = root; chip; chip = chip->next) {
-		void (*enumerate)(struct chip *chip);
-		enumerate = chip_enumerate;
-		if (chip->control && chip->control->enumerate) {
-			enumerate = chip->control->enumerate;
-		}
-		enumerate(chip);
-	}
-
-	for(chip = root; chip; chip = chip->next) {
-		if (chip->children) {
-			enumerate_static_device_chain(chip->children);
-		}
-	}
-}
-
-/**
- * @brief Enumerate static devices in the system.
- *
- * Static device is . Static devices are actually enumerated or "listed" in
- * the Config.lb config file and the corresponding data structures are
- * generated by config tool in the static.c. 
- *
- * \note The definition of 'enumerate' is not clear in this context. Does it
- * mean probe ?
- *
- * \note How do we determine the existence of the static devices ? Static
- * devices are listed in the config file and generated at compile time by config
- * tool. This function is called at certain point in the early stage of
- * LinuxBIOS. It uses the chip_enumerate() function to convert the static
- * structures into dynamic ones. What if the static devices listed in the config
- * file does actually not exist in the system ? Is there any side effect of
- * these 'phantom' device structures
- *
- * The static device does not necesarry conform to the dynamic device tree in
- * the system.
- */
-void enumerate_static_devices(void)
-{
-	struct chip *child;
-	int i;
-	printk_info("Enumerating static devices...\n");
-	static_root.dev = &dev_root;
-	dev_root.links  = MAX_LINKS;
-	for(i = 0; i < MAX_LINKS; i++) {
-		dev_root.link[i].link = i;
-		dev_root.link[i].dev = &dev_root;
-		for(child = static_root.children; child; child = child->next) {
-			if (!child->bus && child->link == i) {
-				child->bus = &dev_root.link[i];
-			}
-		}
-	}
-	for(child = static_root.children; child; child = child->next) {
-		if (!child->bus) {
-			child->bus = &dev_root.link[0];
-		}
-	}
-	enumerate_static_device_chain(&static_root);
-}

src/devices/device.c

@@ -27,7 +27,7 @@
 /** Linked list of ALL devices */
 struct device *all_devices = &dev_root;
 /** Pointer to the last device */
-static struct device **last_dev_p = &dev_root.next;
+extern struct device **last_dev_p;
 
 /** The upper limit of MEM resource of the devices.
  * Reserve 20M for the system */
@@ -504,6 +504,9 @@ void dev_enumerate(void)
 	unsigned subordinate;
 	printk_info("Enumerating buses...\n");
 	root = &dev_root;
+	if (root->chip_ops && root->chip_ops->enable_dev) {
+		root->chip_ops->enable_dev(root);
+	}
 	if (!root->ops || !root->ops->scan_bus) {
 		printk_err("dev_root missing scan_bus operation");
 		return;

src/devices/device_util.c

@@ -133,6 +133,14 @@ const char *dev_path(device_t dev)
 			sprintf(buffer, "APIC: %02x",
 				dev->path.u.apic.apic_id);
 			break;
+		case DEVICE_PATH_PCI_DOMAIN:
+			sprintf(buffer, "PCI_DOMAIN: %04x",
+				dev->path.u.pci_domain.domain);
+			break;
+		case DEVICE_PATH_APIC_CLUSTER:
+			sprintf(buffer, "APIC_CLUSTER: %01x",
+				dev->path.u.apic_cluster.cluster);
+			break;
 		default:
 			printk_err("Unknown device path type: %d\n", dev->path.type);
 			break;
@@ -155,8 +163,7 @@ int path_eq(struct device_path *path1, struct device_path *path2)
 			equal = 1;
 			break;
 		case DEVICE_PATH_PCI:
-			equal = (path1->u.pci.bus == path2->u.pci.bus) &&
+			equal = (path1->u.pci.devfn == path2->u.pci.devfn);
-				(path1->u.pci.devfn == path2->u.pci.devfn);
 			break;
 		case DEVICE_PATH_PNP:
 			equal = (path1->u.pnp.port == path2->u.pnp.port) &&
@@ -168,6 +175,12 @@ int path_eq(struct device_path *path1, struct device_path *path2)
 		case DEVICE_PATH_APIC:
 			equal = (path1->u.apic.apic_id == path2->u.apic.apic_id);
 			break;
+		case DEVICE_PATH_PCI_DOMAIN:
+			equal = (path1->u.pci_domain.domain == path2->u.pci_domain.domain);
+			break;
+		case DEVICE_PATH_APIC_CLUSTER:
+			equal = (path1->u.apic_cluster.cluster == path2->u.apic_cluster.cluster);
+			break;
 		default:
 			printk_err("Uknown device type: %d\n", path1->type);
 			break;

src/devices/hypertransport.c

@@ -5,7 +5,6 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/hypertransport.h>
-#include <device/chip.h>
 #include <part/hard_reset.h>
 #include <part/fallback_boot.h>
 
@@ -263,8 +262,8 @@ unsigned int hypertransport_scan_chain(struct bus *bus, unsigned int max)
 			/* Add this device to the pci bus chain */
 			*chain_last = dev;
 			/* Run the magice enable sequence for the device */
-			if (dev->chip && dev->chip->control && dev->chip->control->enable_dev) {
+			if (dev->chip_ops && dev->chip_ops->enable_dev) {
-				dev->chip->control->enable_dev(dev);
+				dev->chip_ops->enable_dev(dev);
 			}
 			/* Now read the vendor and device id */
 			id = pci_read_config32(dev, PCI_VENDOR_ID);

src/devices/pci_device.c

@@ -18,7 +18,6 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
-#include <device/chip.h>
 #include <part/hard_reset.h>
 #include <part/fallback_boot.h>
 #include <delay.h>
@@ -486,7 +485,7 @@ void pci_dev_enable_resources(struct device *dev)
 
 	/* Set the subsystem vendor and device id for mainboard devices */
 	ops = ops_pci(dev);
-	if (dev->chip && ops && ops->set_subsystem) {
+	if (dev->chip_ops && ops && ops->set_subsystem) {
 		printk_debug("%s subsystem <- %02x/%02x\n",
 			dev_path(dev), 
 			MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID,
@@ -740,10 +739,9 @@ unsigned int pci_scan_bus(struct bus *bus,
 			 * it may be absent and enable_dev must cope.
 			 * 
 			 */
-			if (	dev->chip && dev->chip->control && 
+			if (dev->chip_ops && dev->chip_ops->enable_dev) 
-				dev->chip->control->enable_dev) 
 			{
-				dev->chip->control->enable_dev(dev);
+				dev->chip_ops->enable_dev(dev);
 			}
 			/* Now read the vendor and device id */
 			id = pci_read_config32(dev, PCI_VENDOR_ID);

src/devices/pnp_device.c

@@ -185,22 +185,24 @@ static void get_resources(device_t dev, struct pnp_info *info)
 	}	
 } 
 
-void pnp_enumerate(struct chip *chip, unsigned functions, 
+void pnp_enable_devices(device_t base_dev, struct device_operations *ops, 
-	struct device_operations *ops, struct pnp_info *info)
+	unsigned functions, struct pnp_info *info)
 {
 	struct device_path path;
 	device_t dev;
 	int i;
 
-	chip_enumerate(chip);
-
 	path.type       = DEVICE_PATH_PNP;
-	path.u.pnp.port = chip->dev->path.u.pnp.port;
+	path.u.pnp.port = base_dev->path.u.pnp.port;
 	
 	/* Setup the ops and resources on the newly allocated devices */
 	for(i = 0; i < functions; i++) {
 		path.u.pnp.device = info[i].function;
-		dev = alloc_find_dev(chip->bus, &path);
+		dev = alloc_find_dev(base_dev->bus, &path);
+		
+		/* Don't initialize a device multiple times */
+		if (dev->ops) 
+			continue;
 
 		if (info[i].ops == 0) {
 			dev->ops = ops;

src/devices/root_device.c

@@ -76,6 +76,9 @@ unsigned int scan_static_bus(device_t bus, unsigned int max)
 
 	for(link = 0; link < bus->links; link++) {
 		for(child = bus->link[link].children; child; child = child->sibling) {
+			if (child->chip_ops && child->chip_ops->enable_dev) {
+				child->chip_ops->enable_dev(child);
+			}
 			if (child->ops && child->ops->enable) {
 				child->ops->enable(child);
 			}
@@ -142,7 +145,6 @@ unsigned int root_dev_scan_bus(device_t root, unsigned int max)
 
 void root_dev_init(device_t root)
 {
-	initialize_cpus(root);
 }
 
 /**
@@ -169,9 +171,4 @@ struct device_operations default_dev_ops_root = {
  * This is the root of the dynamic device tree. A PCI tree always has 
  * one bus, bus 0. Bus 0 contains devices and bridges. 
  */
-struct device dev_root = {
+extern struct device dev_root;
-	.ops = &default_dev_ops_root,
-	.bus = &dev_root.link[0],
-	.path = { .type = DEVICE_PATH_ROOT },
-	.enabled = 1,
-};

src/include/cpu/cpu.h

@@ -5,7 +5,7 @@ struct device;
 #include <arch/cpu.h>
 
 void cpu_initialize(void);
-void initialize_cpus(struct device *root);
+void initialize_cpus(struct bus *cpu_bus);
 
 #define __cpu_driver __attribute__ ((used,__section__(".rodata.cpu_driver")))
 /** start of compile time generated pci driver array */

src/include/device/chip.h

@@ -1,85 +0,0 @@
-#ifndef DEVICE_CHIP_H
-#define DEVICE_CHIP_H
-
-#include <device/path.h>
-#include <device/device.h>
-
-/* chips are arbitrary chips (superio, southbridge, etc.)
- * They have private structures that define chip resources and default 
- * settings. They have four externally visible functions for control. 
- * They have a generic component which applies to all chips for 
- * path, etc. 
- */
-
-/* some of the types of resources chips can control */
-#if CONFIG_CHIP_CONFIGURE == 1
-#define CONFIGURE(pass) chip_configure(&static_root, pass)
-#else
-#define CONFIGURE(pass)
-#endif
-
-enum chip_pass {
-	CONF_PASS_PRE_CONSOLE,
-	CONF_PASS_PRE_PCI,
-	CONF_PASS_PRE_DEVICE_ENUMERATE,
-	CONF_PASS_PRE_DEVICE_CONFIGURE,
-	CONF_PASS_PRE_DEVICE_ENABLE,
-	CONF_PASS_PRE_DEVICE_INITIALIZE,
-	CONF_PASS_POST_PCI,
-	CONF_PASS_PRE_BOOT
-};
-
-
-/* linkages from devices of a type (e.g. superio devices) 
- * to the actual physical PCI device. This type is used in an array of 
- * structs built by NLBConfig.py. We owe this idea to Plan 9.
- */
-
-struct chip;
-struct device;
-
-/* there is one of these for each TYPE of chip */
-struct chip_control {
-	/* This is the print name for debugging */
-	char *name;
-	void (*enable)(struct chip *, enum chip_pass);
-	void (*enumerate)(struct chip *chip);
-	void (*enable_dev)(struct device *dev);
-};
-
-struct chip_resource {
-	unsigned long flags;
-	unsigned long index;
-	unsigned long base;
-};
-
-struct chip_device_path {
-	struct device_path path;
-	unsigned channel;
-	int enabled;
-	struct chip_resource resource[MAX_RESOURCES];
-};
-
-struct device;
-struct bus;
-
-#ifndef MAX_CHIP_PATHS
-#define MAX_CHIP_PATHS 16
-#endif
-struct chip {
-	unsigned link;
-	struct chip_control *control; /* for this device */
-	struct chip_device_path path[MAX_CHIP_PATHS]; /* can be 0, in which case the default is taken */
-	char *configuration; /* can be 0. */
-	struct chip *next, *children;
-	/* there is one of these for each INSTANCE of a chip */
-	void *chip_info; /* the dreaded "void *" */
-	/* bus and device links into the device tree */
-	struct bus *bus;
-	struct device *dev;
-};
-
-extern struct chip static_root;
-extern void chip_configure(struct chip *, enum chip_pass);
-extern void chip_enumerate(struct chip *chip);
-#endif /* DEVICE_CHIP_H */

src/include/device/device.h

@@ -5,11 +5,18 @@
 #include <device/resource.h>
 #include <device/path.h>
 
+
 struct device;
 typedef struct device * device_t;
 struct pci_operations;
 struct smbus_bus_operations;
 
+/* Chip operations */
+struct chip_operations {
+	char *name; 	/* This is the print name for debugging */
+	void (*enable_dev)(struct device *dev);
+};
+
 struct device_operations {
 	void (*read_resources)(device_t dev);
 	void (*set_resources)(device_t dev);
@@ -67,7 +74,7 @@ struct device {
 
 	unsigned long rom_address;
 	struct device_operations *ops;
-	struct chip_control *chip_control;
+	struct chip_operations *chip_ops;
 	void *chip_info;
 };
 

src/include/device/path.h

@@ -10,7 +10,7 @@ enum device_path_type {
 	DEVICE_PATH_I2C,
 	DEVICE_PATH_APIC,
 	DEVICE_PATH_PCI_DOMAIN,
-	DEVICE_APIC_CLUSTER,
+	DEVICE_PATH_APIC_CLUSTER,
 };
 
 struct pci_domain_path

src/include/device/pnp.h

@@ -4,7 +4,6 @@
 #include <stdint.h>
 #include <device/device.h>
 #include <device/pnp_def.h>
-#include <device/chip.h>
 
 /* Primitive pnp resource manipulation */
 void    pnp_write_config(device_t dev, uint8_t reg, uint8_t value);
@@ -45,7 +44,7 @@ struct pnp_info {
 	struct io_info io0, io1, io2, io3;
 };
 struct resource *pnp_get_resource(device_t dev, unsigned index);
-void pnp_enumerate(struct chip *chip, unsigned functions, 
+void pnp_enable_devices(struct device *dev, struct device_operations *ops,
-	struct device_operations *ops, struct pnp_info *info);
+	unsigned functions, struct pnp_info *info);
 
 #endif /* DEVICE_PNP_H */

src/include/device/smbus.h

@@ -4,7 +4,6 @@
 #include <stdint.h>
 #include <device/device.h>
 #include <device/path.h>
-#include <device/chip.h>
 #include <device/smbus_def.h>
 
 /* Common smbus bus operations */

src/lib/version.c

@@ -1,8 +1,5 @@
 #include <version.h>
 
-#define __STR(X) #X
-#define STR(X) __STR(X)
-
 #ifndef MAINBOARD_VENDOR
 #error MAINBOARD_VENDOR not defined
 #endif
@@ -39,23 +36,23 @@
 
 
 #ifndef  LINUXBIOS_EXTRA_VERSION
-#define LINUXBIOS_EXTRA_VERSION
+#define LINUXBIOS_EXTRA_VERSION ""
 #endif
 
-const char mainboard_vendor[] = STR(MAINBOARD_VENDOR);
+const char mainboard_vendor[] = MAINBOARD_VENDOR;
-const char mainboard_part_number[] = STR(MAINBOARD_PART_NUMBER);
+const char mainboard_part_number[] = MAINBOARD_PART_NUMBER;
 
-const char linuxbios_version[] = STR(LINUXBIOS_VERSION);
+const char linuxbios_version[] = LINUXBIOS_VERSION;
-const char linuxbios_extra_version[] = STR(LINUXBIOS_EXTRA_VERSION);
+const char linuxbios_extra_version[] = LINUXBIOS_EXTRA_VERSION;
-const char linuxbios_build[] = STR(LINUXBIOS_BUILD);
+const char linuxbios_build[] = LINUXBIOS_BUILD;
 
-const char linuxbios_compile_time[]   = STR(LINUXBIOS_COMPILE_TIME);
+const char linuxbios_compile_time[]   = LINUXBIOS_COMPILE_TIME;
-const char linuxbios_compile_by[]     = STR(LINUXBIOS_COMPILE_BY);
+const char linuxbios_compile_by[]     = LINUXBIOS_COMPILE_BY;
-const char linuxbios_compile_host[]   = STR(LINUXBIOS_COMPILE_HOST);
+const char linuxbios_compile_host[]   = LINUXBIOS_COMPILE_HOST;
-const char linuxbios_compile_domain[] = STR(LINUXBIOS_COMPILE_DOMAIN);
+const char linuxbios_compile_domain[] = LINUXBIOS_COMPILE_DOMAIN;
-const char linuxbios_compiler[]       = STR(LINUXBIOS_COMPILER);
+const char linuxbios_compiler[]       = LINUXBIOS_COMPILER;
-const char linuxbios_linker[]         = STR(LINUXBIOS_LINKER);
+const char linuxbios_linker[]         = LINUXBIOS_LINKER;
-const char linuxbios_assembler[]      = STR(LINUXBIOS_ASSEMBLER);
+const char linuxbios_assembler[]      = LINUXBIOS_ASSEMBLER;
 
 
 

src/mainboard/Iwill/DK8S2/mainboard.c

@@ -5,7 +5,6 @@
 #include <device/pci_ops.h>
 
 #include <arch/io.h>
-#include <device/chip.h>
 #include "../../../northbridge/amd/amdk8/northbridge.h"
 #include "chip.h"
 

src/mainboard/Iwill/DK8X/mainboard.c

@@ -5,7 +5,6 @@
 #include <device/pci_ops.h>
 
 #include <arch/io.h>
-#include <device/chip.h>
 #include "../../../northbridge/amd/amdk8/northbridge.h"
 #include "chip.h"
 

src/mainboard/amd/quartet/mainboard.c

@@ -5,7 +5,6 @@
 #include <device/pci_ops.h>
 
 #include <arch/io.h>
-#include <device/chip.h>
 #include "../../../northbridge/amd/amdk8/northbridge.h"
 #include "chip.h"
 

src/mainboard/amd/serenade/mainboard.c

@@ -5,7 +5,6 @@
 #include <device/pci_ops.h>
 
 #include <arch/io.h>
-#include <device/chip.h>
 #include "../../../northbridge/amd/amdk8/northbridge.h"
 #include "chip.h"
 

src/mainboard/amd/solo/mainboard.c

@@ -6,7 +6,6 @@
 #include <device/pci_ops.h>
 
 #include <arch/io.h>
-#include <device/chip.h>
 #include "../../../northbridge/amd/amdk8/northbridge.h"
 #include "chip.h"
 

src/mainboard/arima/hdama/Options.lb

@@ -34,15 +34,31 @@ uses MAINBOARD_VENDOR
 uses MAINBOARD
 uses LINUXBIOS_EXTRA_VERSION
 uses _RAMBASE
+uses CC
+uses HOSTCC
+uses TTYS0_BAUD
+uses TTYS0_BASE
+uses TTYS0_LCS
+uses DEFAULT_CONSOLE_LOGLEVEL
+uses MAXIMUM_CONSOLE_LOGLEVEL
+uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL
+uses CONFIG_CONSOLE_SERIAL8250
 
 
-## ROM_SIZE is the size of boot ROM that this board will use.
-default ROM_SIZE=524288
-
 ###
 ### Build options
 ###
 
+##
+## ROM_SIZE is the size of boot ROM that this board will use.
+##
+default ROM_SIZE=524288
+
+##
+## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
+##
+default FALLBACK_SIZE=131072
+
 ##
 ## Build code for the fallback boot
 ##
@@ -123,6 +139,10 @@ default HEAP_SIZE=0x4000
 ## Only use the option table in a normal image
 ##
 default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
+
+##
+## LinuxBIOS C code runs at this location in RAM
+##
 default _RAMBASE=0x00004000
 
 ##
@@ -130,5 +150,61 @@ default _RAMBASE=0x00004000
 ##
 default CONFIG_ROM_STREAM = 1
 
+###
+### Defaults of options that you may want to override in the target config file
+### 
 
+##
+## The default compiler
+##
+default CC="gcc"
+default HOSTCC="gcc"
+
+##
+## The Serial Console
+##
+
+# To Enable the Serial Console
+default CONFIG_CONSOLE_SERIAL8250=1
+
+## Select the serial console baud rate
+default TTYS0_BAUD=115200
+#default TTYS0_BAUD=57600
+#default TTYS0_BAUD=38400
+#default TTYS0_BAUD=19200
+#default TTYS0_BAUD=9600
+#default TTYS0_BAUD=4800
+#default TTYS0_BAUD=2400
+#default TTYS0_BAUD=1200
+
+# Select the serial console base port
+default TTYS0_BASE=0x3f8
+
+# Select the serial protocol
+# This defaults to 8 data bits, 1 stop bit, and no parity
+default TTYS0_LCS=0x3
+
+##
+### Select the linuxBIOS loglevel
+##
+## EMERG      1   system is unusable               
+## ALERT      2   action must be taken immediately 
+## CRIT       3   critical conditions              
+## ERR        4   error conditions                 
+## WARNING    5   warning conditions               
+## NOTICE     6   normal but significant condition 
+## INFO       7   informational                    
+## DEBUG      8   debug-level messages             
+## SPEW       9   Way too many details             
+
+## Request this level of debugging output
+default  DEFAULT_CONSOLE_LOGLEVEL=8
+## At a maximum only compile in this level of debugging
+default  MAXIMUM_CONSOLE_LOGLEVEL=8
+
+##
+## Select power on after power fail setting
+default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
+
+### End Options.lb
 end

src/mainboard/arima/hdama/chip.h

@@ -1,4 +1,4 @@
-extern struct chip_control mainboard_arima_hdama_control;
+extern struct chip_operations mainboard_arima_hdama_ops;
 
 struct mainboard_arima_hdama_config {
 	int nothing;

src/mainboard/arima/hdama/mainboard.c

@@ -9,7 +9,6 @@
 #include <delay.h>
 
 #include <arch/io.h>
-#include <device/chip.h>
 #include "../../../northbridge/amd/amdk8/northbridge.h"
 #include "../../../northbridge/amd/amdk8/cpu_rev.c"
 #include "chip.h"
@@ -312,13 +311,12 @@ static struct device_operations mainboard_operations = {
 	.enable           = 0,
 };
 
-static void enumerate(struct chip *chip)
+static void enable_dev(struct chip *chip)
 {
 	dev_root.ops = &mainboard_operations;
-	chip_enumerate(chip);
 }
-struct chip_control mainboard_arima_hdama_control = {
+struct chip_operations mainboard_arima_hdama_ops = {
-	.enumerate = enumerate, 
 	.name      = "Arima HDAMA mainboard ",
+	.enable_dev = enable_dev, 
 };
 

src/mainboard/densitron/dpx114/mainboard.c

@@ -1,4 +1,3 @@
-
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
@@ -6,7 +5,6 @@
 #include <device/pci_ops.h>
 
 #include <arch/io.h>
-#include <device/chip.h>
 #include "chip.h"
 
 static int

src/mainboard/digitallogic/adl855pc/mainboard.c

@@ -1,4 +1,3 @@
-
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
@@ -6,7 +5,6 @@
 #include <device/pci_ops.h>
 
 #include <arch/io.h>
-#include <device/chip.h>
 #include "chip.h"
 
 static int

src/mainboard/emulation/qemu-i386/mainboard.c

@@ -5,7 +5,6 @@
 #include <device/pci_ops.h>
 
 #include <arch/io.h>
-#include <device/chip.h>
 #include "chip.h"
 
 void cpufixup(unsigned long mem)

src/mainboard/ibm/e325/mainboard.c

@@ -5,7 +5,6 @@
 #include <device/pci_ops.h>
 
 #include <arch/io.h>
-#include <device/chip.h>
 #include "../../../northbridge/amd/amdk8/northbridge.h"
 #include "chip.h"
 

src/mainboard/newisys/khepri/mainboard.c

@@ -5,7 +5,6 @@
 #include <device/pci_ops.h>
 
 #include <arch/io.h>
-#include <device/chip.h>
 #include "../../../northbridge/amd/amdk8/northbridge.h"
 #include "chip.h"
 

src/mainboard/technologic/ts5300/mainboard.c

@@ -1,4 +1,3 @@
-
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
@@ -6,7 +5,6 @@
 #include <device/pci_ops.h>
 
 #include <arch/io.h>
-#include <device/chip.h>
 #include "chip.h"
 
 static int

src/mainboard/tyan/s2735/mainboard.c

@@ -1,6 +1,5 @@
 #include <console/console.h>
 #include <device/device.h>
-#include <device/chip.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>

src/mainboard/tyan/s2850/mainboard.c

@@ -1,6 +1,5 @@
 #include <console/console.h>
 #include <device/device.h>
-#include <device/chip.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>

src/mainboard/tyan/s2875/mainboard.c

@@ -1,6 +1,5 @@
 #include <console/console.h>
 #include <device/device.h>
-#include <device/chip.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>

src/mainboard/tyan/s2880/mainboard.c

@@ -1,6 +1,5 @@
 #include <console/console.h>
 #include <device/device.h>
-#include <device/chip.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>

src/mainboard/tyan/s2881/mainboard.c

@@ -1,6 +1,5 @@
 #include <console/console.h>
 #include <device/device.h>
-#include <device/chip.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>

src/mainboard/tyan/s2882/mainboard.c

@@ -1,6 +1,5 @@
 #include <console/console.h>
 #include <device/device.h>
-#include <device/chip.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>

src/mainboard/tyan/s2885/mainboard.c

@@ -1,6 +1,5 @@
 #include <console/console.h>
 #include <device/device.h>
-#include <device/chip.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>

src/mainboard/tyan/s4880/mainboard.c

@@ -1,6 +1,5 @@
 #include <console/console.h>
 #include <device/device.h>
-#include <device/chip.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>

src/mainboard/tyan/s4882/mainboard.c

@@ -1,6 +1,5 @@
 #include <console/console.h>
 #include <device/device.h>
-#include <device/chip.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>

src/mainboard/via/epia-m/mainboard.c

@@ -1,4 +1,3 @@
-
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
@@ -6,7 +5,6 @@
 #include <device/pci_ops.h>
 
 #include <arch/io.h>
-#include <device/chip.h>
 #include "chip.h"
 
 void vga_enable_console();

src/mainboard/via/epia/mainboard.c

@@ -1,4 +1,3 @@
-
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
@@ -6,7 +5,6 @@
 #include <device/pci_ops.h>
 
 #include <arch/io.h>
-#include <device/chip.h>
 #include "chip.h"
 
 static int

src/northbridge/amd/amdk8/chip.h

@@ -2,4 +2,4 @@ struct northbridge_amd_amdk8_config
 {
 };
 
-extern struct chip_control northbridge_amd_amdk8_control;
+extern struct chip_operations northbridge_amd_amdk8_ops;

src/northbridge/amd/amdk8/northbridge.c

@@ -6,10 +6,10 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/hypertransport.h>
-#include <device/chip.h>
 #include <stdlib.h>
 #include <string.h>
 #include <bitops.h>
+#include <cpu/cpu.h>
 #include "chip.h"
 #include "northbridge.h"
 #include "amdk8.h"
@@ -487,7 +487,7 @@ static struct pci_driver mcf0_driver __pci_driver = {
 
 #define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH)
 
-static void bridge_read_resources(device_t dev)
+static void pci_domain_read_resources(device_t dev)
 {
 	struct resource *resource;
 	unsigned reg;
@@ -556,7 +556,7 @@ static void ram_resource(device_t dev, unsigned long index,
 		IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
 }
 
-static void bridge_set_resources(device_t dev)
+static void pci_domain_set_resources(device_t dev)
 {
 	struct resource *io, *mem1, *mem2;
 	struct resource *resource, *last;
@@ -577,7 +577,7 @@ static void bridge_set_resources(device_t dev)
 	mem2 = find_resource(dev, 2);
 	/* See if both resources have roughly the same limits */
 	if (((mem1->limit <= 0xffffffff) && (mem2->limit <= 0xffffffff)) ||
-		(mem1->limit > 0xffffffff) && (mem2->limit > 0xffffffff))
+		((mem1->limit > 0xffffffff) && (mem2->limit > 0xffffffff)))
 	{
 		/* If so place the one with the most stringent alignment first
 		 */
@@ -682,21 +682,34 @@ static void bridge_set_resources(device_t dev)
 	assign_resources(&dev->link[0]);
 }
 
-
+static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
-
-static unsigned int bridge_scan_bus(device_t root, unsigned int max)
 {
-	struct bus *cpu_bus;
 	unsigned reg;
 	int i;
 	/* Unmap all of the HT chains */
 	for(reg = 0xe0; reg <= 0xec; reg += 4) {
 		f1_write_config32(reg, 0);
 	}
-	max = pci_scan_bus(&root->link[0], PCI_DEVFN(0x18, 0), 0xff, max);
+	max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0x18, 0), 0xff, max);
+	return max;
+}
+
+static struct device_operations pci_domain_ops = {
+	.read_resources   = pci_domain_read_resources,
+	.set_resources    = pci_domain_set_resources,
+	.enable_resources = enable_childrens_resources,
+	.init             = 0,
+	.scan_bus         = pci_domain_scan_bus,
+};
+
+static unsigned int scan_cpu_bus(device_t dev, unsigned int max)
+{
+	struct bus *cpu_bus;
+	unsigned reg;
+	int i;
 
 	/* Find which cpus are present */
-	cpu_bus = &dev_root.link[1];
+	cpu_bus = &dev->link[0];
 	for(i = 0; i < 7; i++) {
 		device_t dev, cpu;
 		struct device_path cpu_path;
@@ -732,40 +745,39 @@ static unsigned int bridge_scan_bus(device_t root, unsigned int max)
 				dev_path(cpu), cpu->enabled?"enabled":"disabled");
 		}
 	}
-
 	return max;
 }
 
+static void cpu_bus_init(device_t dev)
+{
+	printk_debug("cpu_bus_init\n");
+#if 0
+	initialize_cpus(&dev->link[0]);
+#endif
+}
 
-static struct device_operations bridge_ops = {
+static struct device_operations cpu_bus_ops = {
-	.read_resources   = bridge_read_resources,
+	.read_resources   = 0,
-	.set_resources    = bridge_set_resources,
+	.set_resources    = 0,
-	.enable_resources = enable_childrens_resources,
+	.enable_resources = 0,
-	.init             = 0,
+	.init             = cpu_bus_init,	
-	.scan_bus         = bridge_scan_bus,
+	.scan_bus         = scan_cpu_bus,
 };
 
-static void enumerate(struct chip *chip)
+static void enable_dev(struct device *dev)
 {
 	struct device_path path;
-	device_t bridge;
-	chip_enumerate(chip);
 
-	/* Get the path for the bridge device */
+	/* Set the operations if it is a special bus type */
-	path.type         = DEVICE_PATH_PNP;
+	if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
-	path.u.pnp.port   = 0xcf8;
+		dev->ops = &pci_domain_ops;
-	path.u.pnp.device = 0;
+	}
-
+	else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) {
-	/* Lookup the bridge device */
+		dev->ops = &cpu_bus_ops;
-	bridge = find_dev_path(&dev_root.link[0], &path);
-
-	/* Set the bridge operations */
-	if (bridge) {
-		bridge->ops = &bridge_ops;
 	}
 }
 
-struct chip_control northbridge_amd_amdk8_control = {
+struct chip_operations northbridge_amd_amdk8_ops = {
 	.name       = "AMD K8 Northbridge",
-	.enumerate = enumerate,
+	.enable_dev = enable_dev,
 };

src/northbridge/emulation/qemu-i386/northbridge.c

@@ -6,7 +6,6 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/hypertransport.h>
-#include <device/chip.h>
 #include <stdlib.h>
 #include <string.h>
 #include <bitops.h>

src/northbridge/intel/855pm/northbridge.c

@@ -5,7 +5,6 @@
 #include <part/sizeram.h>
 #include <device/device.h>
 #include <device/pci.h>
-#include <device/chip.h>
 #include <stdlib.h>
 #include <string.h>
 #include <bitops.h>

src/northbridge/intel/e7501/northbridge.c

@@ -5,7 +5,6 @@
 #include <part/sizeram.h>
 #include <device/device.h>
 #include <device/pci.h>
-#include <device/chip.h>
 #include <stdlib.h>
 #include <string.h>
 #include <bitops.h>

src/northbridge/intel/i855pm/northbridge.c

@@ -5,7 +5,6 @@
 #include <part/sizeram.h>
 #include <device/device.h>
 #include <device/pci.h>
-#include <device/chip.h>
 #include <stdlib.h>
 #include <string.h>
 #include <bitops.h>

src/northbridge/transmeta/tm5800/northbridge.c

@@ -7,7 +7,6 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/hypertransport.h>
-#include <device/chip.h>
 #include <stdlib.h>
 #include <string.h>
 #include <bitops.h>

src/northbridge/via/vt8601/northbridge.c

@@ -6,7 +6,6 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/hypertransport.h>
-#include <device/chip.h>
 #include <stdlib.h>
 #include <string.h>
 #include <bitops.h>

src/northbridge/via/vt8623/northbridge.c

@@ -7,7 +7,6 @@
 #include <device/pci.h>
 #include <device/hypertransport.h>
 #include <device/pci_ids.h>
-#include <device/chip.h>
 #include <stdlib.h>
 #include <string.h>
 #include <bitops.h>

src/southbridge/amd/amd8111/Config.lb

@@ -1,4 +1,4 @@
-config amd8111.h
+config chip.h
 driver amd8111.o
 #driver amd8111_usb.o
 driver amd8111_lpc.o

src/southbridge/amd/amd8111/amd8111.c

@@ -2,7 +2,6 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
-#include <device/chip.h>
 #include "amd8111.h"
 
 void amd8111_enable(device_t dev)
@@ -62,7 +61,7 @@ void amd8111_enable(device_t dev)
 	
 }
 
-struct chip_control southbridge_amd_amd8111_control = {
+struct chip_operations southbridge_amd_amd8111_ops = {
 	.name       = "AMD 8111 Southbridge",
 	.enable_dev = amd8111_enable,
 };

src/southbridge/amd/amd8111/amd8111.h

@@ -1,11 +1,7 @@
 #ifndef AMD8111_H
 #define AMD8111_H
 
-struct southbridge_amd_amd8111_config 
+#include "chip.h"
-{
-};
-struct chip_control;
-extern struct chip_control southbridge_amd_amd8111_control;
 
 void amd8111_enable(device_t dev);
 

src/southbridge/amd/amd8111/amd8111_lpc.c

@@ -6,7 +6,6 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <device/chip.h>
 #include <pc80/mc146818rtc.h>
 #include "amd8111.h"
 

src/southbridge/intel/i82801dbm/i82801dbm.c

@@ -2,7 +2,6 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
-#include <device/chip.h>
 #include "i82801dbm.h"
 
 void i82801dbm_enable(device_t dev)

src/southbridge/intel/i82801dbm/i82801dbm_lpc.c

@@ -7,7 +7,6 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <device/chip.h>
 #include <pc80/mc146818rtc.h>
 #include "i82801dbm.h"
 

src/southbridge/intel/i82801er/i82801er.c

@@ -2,7 +2,6 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
-#include <device/chip.h>
 #include "i82801er.h"
 
 void i82801er_enable(device_t dev)

src/southbridge/intel/i82801er/i82801er_lpc.c

@@ -7,7 +7,6 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <device/chip.h>
 #include <pc80/mc146818rtc.h>
 #include "i82801er.h"
 

src/southbridge/ricoh/rl5c476/rl5c476.c

@@ -25,7 +25,6 @@
 #include <device/pci.h>
 #include <device/pci_ops.h>
 #include <device/pci_ids.h>
-#include <device/chip.h>
 #include <console/console.h>
 #include "rl5c476.h"
 #include "chip.h"

src/southbridge/via/vt8231/vt8231.c

@@ -4,7 +4,6 @@
 #include <device/pci.h>
 #include <device/pci_ops.h>
 #include <device/pci_ids.h>
-#include <device/chip.h>
 #include <console/console.h>
 #include "vt8231.h"
 #include "chip.h"

src/southbridge/via/vt8235/vt8235.c

@@ -4,7 +4,6 @@
 #include <device/pci.h>
 #include <device/pci_ops.h>
 #include <device/pci_ids.h>
-#include <device/chip.h>
 #include <console/console.h>
 #include "vt8235.h"
 #include "chip.h"

src/southbridge/winbond/w83c553/w83c553f.c

@@ -34,7 +34,6 @@
 #include <arch/io.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
-#include <device/chip.h>
 #include <console/console.h>
 #include "w83c553f.h"
 

src/superio/NSC/pc87360/chip.h

@@ -5,7 +5,8 @@
 #define SIO_COM2_BASE   0x2F8
 #endif
 
-extern struct chip_control superio_NSC_pc87360_control;
+struct chip_operations;
+extern struct chip_operations superio_NSC_pc87360_ops;
 
 #include <pc80/keyboard.h>
 #include <uart8250.h>

src/superio/NSC/pc87360/superio.c

@@ -5,7 +5,6 @@
 #include <arch/io.h>
 #include <device/device.h>
 #include <device/pnp.h>
-#include <device/chip.h>
 #include <console/console.h>
 #include <string.h>
 #include <bitops.h>
@@ -24,7 +23,7 @@ static void init(device_t dev)
 	if (!dev->enabled) {
 		return;
 	}
-	conf = dev->chip->chip_info;
+	conf = dev->chip_info;
 	switch(dev->path.u.pnp.device) {
 	case PC87360_SP1: 
 		res0 = find_resource(dev, PNP_IDX_IO0);
@@ -65,13 +64,13 @@ static struct pnp_info pnp_dev_info[] = {
 };
 
 
-static void enumerate(struct chip *chip)
+static void enable_dev(struct device *dev)
 {
-	pnp_enumerate(chip, sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), 
+	pnp_enable_devices(dev, &pnp_ops,
-		&pnp_ops, pnp_dev_info);
+		sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info);
 }
 
-struct chip_control superio_NSC_pc87360_control = {
+struct chip_operations superio_NSC_pc87360_ops = {
-	.enumerate = enumerate,
+	.name       = "NSC 87360",
-	.name      = "NSC 87360"
+	.enable_dev = enable_dev,
 };

src/superio/NSC/pc87366/superio.c

@@ -5,7 +5,6 @@
 #include <arch/io.h>
 #include <device/device.h>
 #include <device/pnp.h>
-#include <device/chip.h>
 #include <console/console.h>
 #include <string.h>
 #include <bitops.h>

src/superio/NSC/pc97307/superio.c

@@ -2,7 +2,6 @@
 /* This code is distributed without warranty under the GPL v2 (see COPYING) */
 
 #include <arch/io.h>
-#include <device/chip.h>
 #include <console/console.h>
 #include "chip.h"
 

src/superio/via/vt1211/vt1211.c

@@ -26,7 +26,6 @@
 #include <device/pci.h>
 #include <device/pci_ops.h>
 #include <device/pci_ids.h>
-#include <device/chip.h>
 #include <console/console.h>
 #include "vt1211.h"
 #include "chip.h"

src/superio/winbond/w83627hf/superio.c

@@ -7,7 +7,6 @@
 #include <arch/io.h>
 #include <device/device.h>
 #include <device/pnp.h>
-#include <device/chip.h>
 #include <console/console.h>
 #include <string.h>
 #include <bitops.h>

src/superio/winbond/w83627thf/superio.c

@@ -7,7 +7,6 @@
 #include <arch/io.h>
 #include <device/device.h>
 #include <device/pnp.h>
-#include <device/chip.h>
 #include <console/console.h>
 #include <string.h>
 #include <bitops.h>

util/newconfig/config.g

@@ -259,6 +259,9 @@ class romimage:
 		# exported options
 		self.exported_options = []
 
+		# Last device built
+		self.last_device = 0
+
 	def getname(self):
 		return self.name
 
@@ -282,7 +285,6 @@ class romimage:
 		if (o):
 			warning("rule %s previously defined" % id)
 		o = makerule(id)
-		print "We are in addmakerule, add %s\n" % id
 		setdict(self.makebaserules, id, o)
 
 	def getmakerules(self):
@@ -579,6 +581,7 @@ class partobj:
 		# links for static device tree
 		self.children = 0
 		self.siblings = 0
+		self.next_device = 0
 		self.chip_or_device = chip_or_device
 
 		# list of init code files
@@ -640,6 +643,12 @@ class partobj:
 			self.instance_name = instance_name
 			self.chipinfo_name = "%s_info_%d" % (self.instance_name, self.instance)
 			
+		# Link this part into the device list
+		if (self.chip_or_device == 'device'):
+			if (image.last_device):
+				image.last_device.next_device = self
+			image.last_device = self
+
 		# Link this part into the tree
 		if (parent and (part != 'arch')):
 			debug.info(debug.gencode, "add to parent")
@@ -769,7 +778,7 @@ class partobj:
 
 		if (self.instance == 0):
 			self.instance_name = "dev_root"
-			file.write("struct %s_config %s_info_%s;\n" % (self.type_name, self.type_name, self.instance))
+			file.write("struct device **last_dev_p = &%s.next;\n" % (self.image.last_device.instance_name))
 			file.write("struct device dev_root = {\n")
 			file.write("\t.ops = &default_dev_ops_root,\n")
 			file.write("\t.bus = &dev_root.link[0],\n")
@@ -780,9 +789,10 @@ class partobj:
 			file.write("\t\t\t.children = &%s,\n" % self.firstchilddevice().instance_name)
 			file.write("\t\t},\n")
 			file.write("\t},\n")
-			if (self.chipconfig != 0):
+			if (self.chipconfig):
-				file.write("\t.chip_control = &%s_control,\n" % self.type_name)
+				file.write("\t.chip_ops = &%s_ops,\n" % self.type_name)
 				file.write("\t.chip_info = &%s_info_%s,\n" % (self.type_name, self.instance))
+			file.write("\t.next = &%s,\n" % self.firstchilddevice().instance_name)
 			file.write("};\n")
 			return
 
@@ -804,9 +814,12 @@ class partobj:
 		sibling = self.firstsiblingdevice();
 		if (sibling):
 			file.write("\t.sibling = &%s,\n" % sibling.instance_name)
-		if (self.chipconfig != 0):
+		chip = self.firstparentchip()
-			file.write("\t.chip_control = &%s_control,\n" % self.firstparentchip().type_name)
+		if (chip and chip.chipconfig):
-			file.write("\t.chip_info = &%s_info_%s,\n" % (self.firstparentchip().type_name, self.firstparentchip().instance))
+			file.write("\t.chip_ops = &%s_ops,\n" % chip.type_name)
+			file.write("\t.chip_info = &%s_info_%s,\n" % (chip.type_name, chip.instance))
+		if (self.next_device):	
+			file.write("\t.next=&%s\n" % self.next_device.instance_name)
 		file.write("};\n")
 		return
 
@@ -1288,7 +1301,7 @@ def mainboard():
 	type_name = flatten_name(partdir)
 	newpart = partobj(curimage, fulldir, partstack.tos(), 'mainboard', \
 		type_name, 0, 0, 'chip')
-	print "Configuring PART %s" % (type)
+	#print "Configuring PART %s" % (type)
 	partstack.push(newpart)
 	#print "  new PART tos is now %s\n" %partstack.tos().info()
 	dirstack.push(fulldir)
@@ -1342,7 +1355,7 @@ def devicepart(type):
 	global curimage, dirstack, partstack
 	newpart = partobj(curimage, 0, partstack.tos(), type, \
 			'', 0, 0, 'device')
-	print "Configuring PART %s" % (type)
+	#print "Configuring PART %s" % (type)
 	partstack.push(newpart)
 	#print "  new PART tos is now %s\n" %partstack.tos().info()
 	# just push TOS, so that we can pop later. 
@@ -1374,7 +1387,7 @@ def partpop():
 	curpart = partstack.tos()
 	if (curpart == 0):
 		fatal("Trying to pop non-existent part")
-	print "End PART %s" % curpart.part
+	#print "End PART %s" % curpart.part
 	# Warn if options are used without being set in this part
 	for op in curpart.uses_options.keys():
 		if (not isset(op, curpart)):
@@ -1406,7 +1419,6 @@ def lookup(name):
 
 def addrule(id):
 	global curimage
-	print "ADDRULE: %s\n" %id
 	curimage.addmakerule(id)
 	
 def adduserdefine(str):
@@ -2167,7 +2179,7 @@ def writecode(image):
 	filename = os.path.join(img_dir, "static.c")
 	print "Creating", filename
 	file = safe_open(filename, 'w+')
-	file.write("#include <device/chip.h>\n")
+	file.write("#include <device/device.h>\n")
 	file.write("#include <device/pci.h>\n")
 	for path in image.getconfigincludes().values():
 		file.write("#include \"%s\"\n" % path)