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mb/intel/adlrvp_m: Enable SaGv support 

Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Change-Id: I80f11b8f0c2a1fdccbc322c3c4783c61684ff37a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55634
Reviewed-by: Selma Bensaid <selma.bensaid@intel.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Bora Guvendik 2021-06-17 11:39:48 -07:00 committed by Paul Fagerburg
parent 6db97a31ef
commit 70a815a1e0
1 changed files with 3 additions and 0 deletions
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src/mainboard/intel/adlrvp/devicetree_m.cb
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@ -35,6 +35,9 @@ chip soc/intel/alderlake
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # M.2 WWAN
register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # M.2 WLAN
# Sagv Configuration
register "SaGv" = "SaGv_Enabled"
# Enable CNVi Bluetooth
register "CnviBtCore" = "true"