mb/supermicro/x11-lga1151-series: fix GPIO reset mapping

When specifying _PAD_CFG_STRUCT with raw hex values, a logical reset
value of 0x0 is only defined for GPD pads. For any other GPIOs this maps
to 0x3.

On the Supermicro X11 boards a value of 0x0 is set for GPP_D22 and
GPP_F23, triggering the error "gpio_pad_reset_config_override: Logical
to Chipset mapping not found".

Set the right value (0x3<<30) for the affected GPIOs.

Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Change-Id: I3ae17dfc4d90f88f5b8bc5bee49740745778a91a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39090
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Michael Niewöhner 2020-02-23 14:58:14 +01:00 committed by Patrick Georgi
parent 1f220a9da7
commit 71b1ed8f77
2 changed files with 4 additions and 4 deletions

View File

@ -114,7 +114,7 @@ static const struct pad_config gpio_table[] = {
/* GPIO */ _PAD_CFG_STRUCT(GPP_D19, 0x84000201, 0x00000000),
/* GPIO */ _PAD_CFG_STRUCT(GPP_D20, 0x44000300, 0x00000000),
/* GPIO */ _PAD_CFG_STRUCT(GPP_D21, 0x44000200, 0x00000000),
/* GPIO */ _PAD_CFG_STRUCT(GPP_D22, 0x04000102, 0x00000000),
/* GPIO */ _PAD_CFG_STRUCT(GPP_D22, 0xc4000102, 0x00000000),
/* GPIO */ _PAD_CFG_STRUCT(GPP_D23, 0x44000300, 0x00000000),
/* SATAXPCIE0 */ _PAD_CFG_STRUCT(GPP_E0, 0x44000502, 0x00000000),
/* GPIO */ _PAD_CFG_STRUCT(GPP_E1, 0x44000300, 0x00000000),
@ -152,7 +152,7 @@ static const struct pad_config gpio_table[] = {
/* GPIO */ _PAD_CFG_STRUCT(GPP_F20, 0x44000300, 0x00000000),
/* GPIO */ _PAD_CFG_STRUCT(GPP_F21, 0x44000300, 0x00000000),
/* GPIO */ _PAD_CFG_STRUCT(GPP_F22, 0x44000300, 0x00000000),
/* GPIO */ _PAD_CFG_STRUCT(GPP_F23, 0x04000200, 0x00000000),
/* GPIO */ _PAD_CFG_STRUCT(GPP_F23, 0xc4000200, 0x00000000),
/* GPIO */ _PAD_CFG_STRUCT(GPP_G0, 0x44000100, 0x00000000),
/* GPIO */ _PAD_CFG_STRUCT(GPP_G1, 0x44000100, 0x00000000),
/* GPIO */ _PAD_CFG_STRUCT(GPP_G2, 0x44000102, 0x00000000),

View File

@ -125,7 +125,7 @@ static const struct pad_config gpio_table[] = {
_PAD_CFG_STRUCT(GPP_D19, 0x84000201, 0x00000010), /* GPIO */
_PAD_CFG_STRUCT(GPP_D20, 0x44000300, 0x00000010), /* GPIO */
_PAD_CFG_STRUCT(GPP_D21, 0x44000200, 0x00000010), /* GPIO */
_PAD_CFG_STRUCT(GPP_D22, 0x04000100, 0x00000010), /* GPIO */
_PAD_CFG_STRUCT(GPP_D22, 0xc4000100, 0x00000010), /* GPIO */
_PAD_CFG_STRUCT(GPP_D23, 0x44000300, 0x00000010), /* GPIO */
/* GPIO Group GPP_E */
@ -167,7 +167,7 @@ static const struct pad_config gpio_table[] = {
_PAD_CFG_STRUCT(GPP_F20, 0x44000300, 0x00000010), /* GPIO */
_PAD_CFG_STRUCT(GPP_F21, 0x44000300, 0x00000010), /* GPIO */
_PAD_CFG_STRUCT(GPP_F22, 0x44000300, 0x00000010), /* GPIO */
_PAD_CFG_STRUCT(GPP_F23, 0x04000200, 0x00000010), /* GPIO */
_PAD_CFG_STRUCT(GPP_F23, 0xc4000200, 0x00000010), /* GPIO */
/* GPIO Group GPP_G */
_PAD_CFG_STRUCT(GPP_G0, 0x44000100, 0x00000010), /* GPIO */