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mb/siemens/mc_ehl: Enable write access for SPD EEPROM on mc_ehl1 

The address space of possible SPD-EEPROMs 0x50..0x53 on the SMBus
interface is per default write-protected in FSP. This avoids that an
SPD-EEPROM on a DRAM module gets overwritten by the host.

On mc_ehl1, memory-down configuration is used and there is no SPD EEPROM
available. Nevertheless, there is a general purpose EEPROM on the same
address available which needs to stay writeable.

This patch disables the default-enabled write protect feature for the
SPD-EEPROM addresses just for mc_ehl1.

Test=Boot into Linux and make sure a write access into the EEPROM is
possible.

Change-Id: I6b0fcdbeb0dbf971cfdceb70d6f4845765a3bdb6
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79334
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jan Samek <jan.samek@siemens.com>
This commit is contained in:
Werner Zeh 2023-11-28 16:26:28 +01:00 committed by Felix Held
parent fd1c2f488f
commit 722c0b7b21
1 changed files with 4 additions and 0 deletions
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4
src/mainboard/siemens/mc_ehl/romstage_fsp_params.c
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@ -38,4 +38,8 @@ void mainboard_memory_init_params(FSPM_UPD *memupd)
/* Enable Row-Hammer prevention */ /* Enable Row-Hammer prevention */
memupd->FspmConfig.RhPrevention = 1; memupd->FspmConfig.RhPrevention = 1;
if (CONFIG(BOARD_SIEMENS_MC_EHL1)) {
/* Allow writes to EEPROM addresses 0x50..0x57. */
memupd->FspmConfig.SmbusSpdWriteDisable = 0;
}
} }