sb/intel/lynxpoint: Use sb/intel/common/platform.asl
Change-Id: I86260a374a3f60f16dc73573e7989f0a4ffec818 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36580 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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@ -25,7 +25,7 @@ DefinitionBlock(
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)
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{
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#include "acpi/platform.asl"
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#include <southbridge/intel/lynxpoint/acpi/platform.asl>
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#include <southbridge/intel/common/acpi/platform.asl>
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#include <southbridge/intel/lynxpoint/acpi/globalnvs.asl>
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#include <southbridge/intel/common/acpi/sleepstates.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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@ -14,7 +14,7 @@
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* GNU General Public License for more details.
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*/
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#include <southbridge/intel/lynxpoint/acpi/platform.asl>
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#include <southbridge/intel/common/acpi/platform.asl>
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/* The _PTS method (Prepare To Sleep) is called before the OS is
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* entering a sleep state. The sleep state number is passed in Arg0
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@ -14,7 +14,7 @@
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* GNU General Public License for more details.
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*/
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#include <southbridge/intel/lynxpoint/acpi/platform.asl>
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#include <southbridge/intel/common/acpi/platform.asl>
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/* The _PTS method (Prepare To Sleep) is called before the OS is
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* entering a sleep state. The sleep state number is passed in Arg0
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@ -14,7 +14,7 @@
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* GNU General Public License for more details.
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*/
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#include <southbridge/intel/lynxpoint/acpi/platform.asl>
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#include <southbridge/intel/common/acpi/platform.asl>
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/* The _PTS method (Prepare To Sleep) is called before the OS is
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* entering a sleep state. The sleep state number is passed in Arg0
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@ -32,7 +32,7 @@ DefinitionBlock(
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{
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#include "acpi/platform.asl"
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#include <cpu/intel/common/acpi/cpu.asl>
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#include <southbridge/intel/lynxpoint/acpi/platform.asl>
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#include <southbridge/intel/common/acpi/platform.asl>
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/* global NVS and variables. */
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#include <southbridge/intel/lynxpoint/acpi/globalnvs.asl>
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#include <southbridge/intel/common/acpi/sleepstates.asl>
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@ -19,7 +19,7 @@
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DefinitionBlock("dsdt.aml", "DSDT", 2, OEM_ID, ACPI_TABLE_CREATOR, 0x20181220)
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{
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#include "acpi/platform.asl"
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#include <southbridge/intel/lynxpoint/acpi/platform.asl>
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#include <southbridge/intel/common/acpi/platform.asl>
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#include <southbridge/intel/lynxpoint/acpi/globalnvs.asl>
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#include <southbridge/intel/common/acpi/sleepstates.asl>
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#include <cpu/intel/common/acpi/cpu.asl>
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@ -1,53 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2011-2012 The Chromium OS Authors. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/* The APM port can be used for generating software SMIs */
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OperationRegion (APMP, SystemIO, 0xb2, 2)
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Field (APMP, ByteAcc, NoLock, Preserve)
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{
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APMC, 8, // APM command
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APMS, 8 // APM status
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}
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/* Port 80 POST */
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OperationRegion (POST, SystemIO, 0x80, 1)
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Field (POST, ByteAcc, Lock, Preserve)
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{
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DBG0, 8
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}
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/* SMI I/O Trap */
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Method(TRAP, 1, Serialized)
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{
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Store (Arg0, SMIF) // SMI Function
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Store (0, TRP0) // Generate trap
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Return (SMIF) // Return value of SMI handler
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}
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/* The _PIC method is called by the OS to choose between interrupt
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* routing via the i8259 interrupt controller or the APIC.
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*
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* _PIC is called with a parameter of 0 for i8259 configuration and
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* with a parameter of 1 for Local Apic/IOAPIC configuration.
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*/
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Method(_PIC, 1)
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{
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// Remember the OS' IRQ routing choice.
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Store(Arg0, PICM)
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}
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