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sb/amd/sr5650: Allow resource allocator to assign bus numbers 

At some point in the past disconnected PCIe bridges were completely
disabled to work around a hang on bridge probe.  This hang was
resolved at some point, and the disconnected PCIe bridges should
be enabled to receive a bus number per the RPR.

This resolves a slew of warnings in the Linux boot log regarding
invalid bridge configurations for disconnected bridge devices.

Change-Id: Ic26e2d62ec5ddb9f22275c2afec7d560326263c7
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/12673
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Timothy Pearson 2015-12-07 12:22:23 -06:00 committed by Martin Roth
parent c7c30a8400
commit 72c83a8e23
1 changed files with 4 additions and 3 deletions
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7
src/southbridge/amd/sr5650/pcie.c
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@ -768,11 +768,12 @@ void sr5650_gpp_sb_init(device_t nb_dev, device_t dev, u32 port)
if (res) { if (res) {
AtiPcieCfg.PortDetect |= 1 << port; AtiPcieCfg.PortDetect |= 1 << port;
} else { } else {
/* If the training failed the disable the bridge to prevent subsequent /* Even though nothing is attached to this port
* lockup on bridge configuration register read during the PCI bus scan * the port needs to be "enabled" to obtain
* a bus number from the PCI resource allocator
*/ */
training_ok = 0; training_ok = 0;
dev->enabled = 0; dev->enabled = 1;
} }
} }
} }