soc/intel/skylake: Move PMC MMIO offset macro into pmc.h

This patch ensures PMC offset 0xfc resides into pmc.h rather defining
into p2sb.h.

Change-Id: Iae1c38beae15355a077be80112b723b8ad3d0a44
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45800
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/intel/skylake/include/soc/p2sb.h

@@ -11,6 +11,4 @@
 
 #define PCH_P2SB_EPMASK0		0xB0
 
-#define PCH_PWRM_ACPI_TMR_CTL		0xFC
-
 #endif /* _SOC_P2SB_H_ */

src/soc/intel/skylake/include/soc/pmc.h

@@ -77,6 +77,7 @@
 #define  DSX_EN_LAN_WAKE_PIN	(1 << 0)
 #define PMSYNC_TPR_CFG		0xc4
 #define  PMSYNC_LOCK		(1 << 31)
+#define PCH_PWRM_ACPI_TMR_CTL	0xfc
 #define GPIO_GPE_CFG		0x120
 #define  GPE0_DWX_MASK		0xf
 #define GPE0_DW_SHIFT(x)	(4*(x))