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nb/intel/pineview: Drop MCHBAR macro from DMIBAR access 

While the macro value is the same, the DMIBAR register is not HTBONUS1.

Tested with BUILD_TIMELESS=1, Foxconn D41S remains identical.

Change-Id: I5025f115f5a55dc782092989f3d158802d1d9353
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51858
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons 2021-03-26 18:01:35 +01:00 committed by Nico Huber
parent 0cc811789c
commit 7383318856
1 changed files with 1 additions and 1 deletions
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src/northbridge/intel/pineview/early_init.c
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@ -99,7 +99,7 @@ static void early_misc_setup(void)
{ {
MCHBAR32(HIT0); MCHBAR32(HIT0);
MCHBAR32(HIT0) = 0x00021800; MCHBAR32(HIT0) = 0x00021800;
DMIBAR32(HTBONUS1) = 0x86000040; DMIBAR32(0x2c) = 0x86000040;
pci_write_config32(PCI_DEV(0, 0x1e, 0), 0x18, 0x00020200); pci_write_config32(PCI_DEV(0, 0x1e, 0), 0x18, 0x00020200);
pci_write_config32(PCI_DEV(0, 0x1e, 0), 0x18, 0x00000000); pci_write_config32(PCI_DEV(0, 0x1e, 0), 0x18, 0x00000000);