intel/sandybridge: Don't hardcode platform type
* Add a function to return CPU platform ID bits * Add a function to return platform type ** Platform id is 4 on Lenovo T430 (mobile) ** Platform id is 1 on HP8200 (desktop) * Use introduced method to handle platform specific code * Use enum for platform type * Report platform ID Change-Id: Ifbfc64c8cec98782d6efc987a4d4d5aeab1402ba Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/22530 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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74203de851
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@ -5,6 +5,10 @@ subdirs-y += ../common
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ramstage-y += acpi.c
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ramstage-y += common.c
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romstage-y += common.c
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smm-$(CONFIG_HAVE_SMI_HANDLER) += common.c
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ramstage-y += tsc_freq.c
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romstage-y += tsc_freq.c
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smm-$(CONFIG_HAVE_SMI_HANDLER) += tsc_freq.c
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@ -0,0 +1,31 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2009 coresystems GmbH
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* Copyright (C) 2011 The Chromium OS Authors. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <types.h>
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#include <cpu/x86/msr.h>
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#include "model_206ax.h"
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#define IA32_PLATFORM_ID 0x17
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int get_platform_id(void)
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{
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msr_t msr;
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msr = rdmsr(IA32_PLATFORM_ID);
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/* Read Platform Id Bits 52:50 */
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return (msr.hi >> 18) & 0x7;
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}
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@ -123,5 +123,6 @@ void set_power_limits(u8 power_limit_1_time);
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int cpu_config_tdp_levels(void);
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void smm_relocate(void);
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#endif
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int get_platform_id(void);
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#endif
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@ -514,6 +514,9 @@ static void model_206ax_init(struct device *cpu)
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fill_processor_name(processor_name);
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printk(BIOS_INFO, "CPU: %s.\n", processor_name);
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/* Print platform ID */
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printk(BIOS_INFO, "CPU: platform id %x\n", get_platform_id());
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/* Setup MTRRs based on physical address size */
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x86_setup_mtrrs_with_detect();
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x86_mtrr_check();
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@ -25,6 +25,11 @@ ramstage-$(CONFIG_SANDYBRIDGE_IVYBRIDGE_LVDS) += gma_ivybridge_lvds.c
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ramstage-y += acpi.c
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romstage-y += ram_calc.c
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ramstage-y += common.c
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romstage-y += common.c
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smm-$(CONFIG_HAVE_SMI_HANDLER) += common.c
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ifeq ($(CONFIG_USE_NATIVE_RAMINIT),y)
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romstage-y += raminit.c
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romstage-y += raminit_common.c
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@ -0,0 +1,32 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2007-2009 coresystems GmbH
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* Copyright (C) 2012 The Chromium OS Authors
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <types.h>
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#include <console/console.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include "sandybridge.h"
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enum platform_type get_platform_type(void)
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{
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const int id = get_platform_id();
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if (id != 1 && id != 4)
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printk(BIOS_WARNING, "WARN: Unknown platform id 0x%x\n", id);
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return (id == 4) ? PLATFORM_MOBILE : PLATFORM_DESKTOP_SERVER;
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}
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@ -186,7 +186,7 @@ static void start_peg_link_training(void)
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}
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}
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void sandybridge_early_initialization(int chipset_type)
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void sandybridge_early_initialization(void)
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{
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u32 capid0_a;
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u32 deven;
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@ -195,10 +195,12 @@ void sandybridge_early_initialization(int chipset_type)
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/* Device ID Override Enable should be done very early */
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capid0_a = pci_read_config32(PCI_DEV(0, 0, 0), 0xe4);
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if (capid0_a & (1 << 10)) {
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const size_t is_mobile = get_platform_type() == PLATFORM_MOBILE;
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reg8 = pci_read_config8(PCI_DEV(0, 0, 0), 0xf3);
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reg8 &= ~7; /* Clear 2:0 */
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if (chipset_type == SANDYBRIDGE_MOBILE)
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if (is_mobile)
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reg8 |= 1; /* Set bit 0 */
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pci_write_config8(PCI_DEV(0, 0, 0), 0xf3, reg8);
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@ -308,7 +308,7 @@ static int try_init_dram_ddr3(ramctr_timing *ctrl, int fast_boot,
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return try_init_dram_ddr3_ivy(ctrl, fast_boot, s3_resume, me_uma_size);
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}
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static void init_dram_ddr3(int mobile, int min_tck, int s3resume)
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static void init_dram_ddr3(int min_tck, int s3resume)
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{
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int me_uma_size;
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int cbmem_was_inited;
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@ -398,7 +398,6 @@ static void init_dram_ddr3(int mobile, int min_tck, int s3resume)
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if (!fast_boot) {
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/* Reset internal state */
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memset(&ctrl, 0, sizeof(ctrl));
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ctrl.mobile = mobile;
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ctrl.tCK = min_tck;
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/* Get architecture */
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@ -421,7 +420,6 @@ static void init_dram_ddr3(int mobile, int min_tck, int s3resume)
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/* Reset internal state */
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memset(&ctrl, 0, sizeof(ctrl));
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ctrl.mobile = mobile;
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ctrl.tCK = min_tck;
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/* Get architecture */
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@ -480,5 +478,5 @@ void perform_raminit(int s3resume)
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timestamp_add_now(TS_BEFORE_INITRAM);
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init_dram_ddr3(1, get_mem_min_tck(), s3resume);
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init_dram_ddr3(get_mem_min_tck(), s3resume);
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}
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@ -763,6 +763,7 @@ static u32 make_mr0(ramctr_timing * ctrl, u8 rank)
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{
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u16 mr0reg, mch_cas, mch_wr;
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static const u8 mch_wr_t[12] = { 1, 2, 3, 4, 0, 5, 0, 6, 0, 7, 0, 0 };
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const size_t is_mobile = get_platform_type() == PLATFORM_MOBILE;
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/* DLL Reset - self clearing - set after CLK frequency has been changed */
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mr0reg = 0x100;
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@ -783,7 +784,7 @@ static u32 make_mr0(ramctr_timing * ctrl, u8 rank)
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mr0reg = (mr0reg & ~0xe00) | (mch_wr << 9);
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// Precharge PD - Fast (desktop) 0x1 or slow (mobile) 0x0 - mostly power-saving feature
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mr0reg = (mr0reg & ~0x1000) | (!ctrl->mobile << 12);
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mr0reg = (mr0reg & ~0x1000) | (!is_mobile << 12);
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return mr0reg;
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}
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@ -3193,6 +3194,8 @@ static int encode_5d10(int ns)
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/* FIXME: values in this function should be hardware revision-dependent. */
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void final_registers(ramctr_timing * ctrl)
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{
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const size_t is_mobile = get_platform_type() == PLATFORM_MOBILE;
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int channel;
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int t1_cycles = 0, t1_ns = 0, t2_ns;
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int t3_ns;
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@ -3203,7 +3206,7 @@ void final_registers(ramctr_timing * ctrl)
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write32(DEFAULT_MCHBAR + 0x400c, (read32(DEFAULT_MCHBAR + 0x400c) & 0xFFFFCFFF) | 0x1000); // OK
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write32(DEFAULT_MCHBAR + 0x440c, (read32(DEFAULT_MCHBAR + 0x440c) & 0xFFFFCFFF) | 0x1000); // OK
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if (ctrl->mobile)
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if (is_mobile)
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/* APD - DLL Off, 64 DCLKs until idle, decision per rank */
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MCHBAR32(PM_PDWN_Config) = 0x00000740;
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else
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@ -75,7 +75,6 @@ struct ramctr_timing_st;
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typedef struct ramctr_timing_st {
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u16 spd_crc[NUM_CHANNELS][NUM_SLOTS];
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int mobile;
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int sandybridge;
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/* DDR base_freq = 100 Mhz / 133 Mhz */
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@ -85,7 +85,7 @@ void mainboard_romstage_entry(unsigned long bist)
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/* Perform some early chipset initialization required
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* before RAM initialization can work
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*/
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sandybridge_early_initialization(SANDYBRIDGE_MOBILE);
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sandybridge_early_initialization();
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printk(BIOS_DEBUG, "Back from sandybridge_early_initialization()\n");
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s3resume = southbridge_detect_s3_resume();
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@ -17,11 +17,6 @@
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#ifndef __NORTHBRIDGE_INTEL_SANDYBRIDGE_SANDYBRIDGE_H__
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#define __NORTHBRIDGE_INTEL_SANDYBRIDGE_SANDYBRIDGE_H__
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/* Chipset types */
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#define SANDYBRIDGE_MOBILE 0
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#define SANDYBRIDGE_DESKTOP 1
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#define SANDYBRIDGE_SERVER 2
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/* Device ID for SandyBridge and IvyBridge */
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#define BASE_REV_SNB 0x00
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#define BASE_REV_IVB 0x50
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/* Everything below this line is ignored in the DSDT */
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#ifndef __ACPI__
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#include <cpu/intel/model_206ax/model_206ax.h>
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/* Chipset types */
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enum platform_type {
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PLATFORM_MOBILE = 0,
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PLATFORM_DESKTOP_SERVER,
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};
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#include <rules.h>
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@ -204,7 +206,7 @@ static inline void barrier(void) { asm("" ::: "memory"); }
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void intel_sandybridge_finalize_smm(void);
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#else /* !__SMM__ */
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int bridge_silicon_revision(void);
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void sandybridge_early_initialization(int chipset_type);
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void sandybridge_early_initialization(void);
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void sandybridge_init_iommu(void);
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void sandybridge_late_initialization(void);
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void northbridge_romstage_finalize(int s3resume);
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void mainboard_config_superio(void);
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int mainboard_should_reset_usb(int s3resume);
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void perform_raminit(int s3resume);
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enum platform_type get_platform_type(void);
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#if ENV_RAMSTAGE && !defined(__SIMPLE_DEVICE__)
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#include <device/device.h>
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