soc/amd/common/block/pci: Implement acpigen_write_pci_{GNB,FCH}_PRT
This is loosely based off of picasso/pcie_gpp.c. This version uses the acpigen_write_PRT_X methods to write the actual records. There are also two functions, 1 for using the GNB, and one for using the FCH. The FCH one is useful when the GNB IO-APIC has not been initialized. BUG=b:184766519 TEST=Dump guybrush ACPI and verify it looks correct Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I926430074acb969ceb11fdb60ab56dcf91ac4c76 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52917 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Raul E Rangel
Felix Held
parent
1d1dbc4cfa
commit
7502e10fdf
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@ -5,6 +5,7 @@
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#include <types.h>
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#include <soc/amd_pci_int_defs.h>
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#include <device/device.h>
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/* FCH index/data registers */
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#define PCI_INTR_INDEX 0xc00
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@ -60,4 +61,7 @@ const struct pci_routing_info *get_pci_routing_info(unsigned int devfn);
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unsigned int pci_calculate_irq(const struct pci_routing_info *routing_info, unsigned int pin);
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void acpigen_write_pci_GNB_PRT(const struct device *dev);
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void acpigen_write_pci_FCH_PRT(const struct device *dev);
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#endif /* AMD_BLOCK_PCI_UTIL_H */
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@ -1,5 +1,10 @@
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ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_PCI) += amd_pci_util.c
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ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_PCI) += pci_routing_info.c
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ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_PCI),y)
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ramstage-y += amd_pci_util.c
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ramstage-y += pci_routing_info.c
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ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi_prt.c
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endif # CONFIG_SOC_AMD_COMMON_BLOCK_PCI
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ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_PCI_MMCONF),y)
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@ -0,0 +1,206 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <acpi/acpi.h>
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#include <acpi/acpigen.h>
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#include <acpi/acpigen_pci.h>
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#include <amdblocks/amd_pci_util.h>
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#include <arch/ioapic.h>
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#include <console/console.h>
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#include <device/device.h>
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static void acpigen_write_PRT_GSI(const struct pci_routing_info *routing_info)
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{
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unsigned int irq;
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acpigen_write_package(4); /* Package - APIC Routing */
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for (unsigned int i = 0; i < 4; ++i) {
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/* GNB IO-APIC is located after the FCH IO-APIC */
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irq = IO_APIC_INTERRUPTS;
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irq += pci_calculate_irq(routing_info, i);
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acpigen_write_PRT_GSI_entry(
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0, /* There is only one device attached to the bridge */
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i, /* pin */
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irq);
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}
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acpigen_pop_len(); /* Package - APIC Routing */
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}
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static void acpigen_write_PRT_PIC(const struct pci_routing_info *routing_info)
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{
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unsigned int irq;
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char link_template[] = "\\_SB.INTX";
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acpigen_write_package(4); /* Package - PIC Routing */
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for (unsigned int i = 0; i < 4; ++i) {
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irq = pci_calculate_irq(routing_info, i);
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link_template[8] = 'A' + (irq % 8);
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acpigen_write_PRT_source_entry(
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0, /* There is only one device attached to the bridge */
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i, /* pin */
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link_template /* Source */,
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0 /* Source Index */);
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}
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acpigen_pop_len(); /* Package - PIC Routing */
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}
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/*
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* This method writes a PCI _PRT table that uses the GNB IO-APIC / PIC :
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* Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
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* {
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* If (PICM)
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* {
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* Return (Package (0x04)
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* {
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* Package (0x04)
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* {
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* 0x0000FFFF,
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* 0x00,
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* 0x00,
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* 0x00000034
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* },
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*
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* Package (0x04)
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* {
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* 0x0000FFFF,
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* 0x01,
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* 0x00,
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* 0x00000035
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* },
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*
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* Package (0x04)
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* {
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* 0x0000FFFF,
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* 0x02,
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* 0x00,
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* 0x00000036
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* },
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*
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* Package (0x04)
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* {
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* 0x0000FFFF,
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* 0x03,
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* 0x00,
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* 0x00000037
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* }
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* })
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* }
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* Else
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* {
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* Return (Package (0x04)
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* {
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* Package (0x04)
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* {
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* 0x0000FFFF,
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* 0x00,
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* \_SB.INTA,
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* 0x00000000
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* },
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*
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* Package (0x04)
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* {
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* 0x0000FFFF,
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* 0x01,
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* \_SB.INTB,
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* 0x00000000
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* },
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*
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* Package (0x04)
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* {
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* 0x0000FFFF,
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* 0x02,
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* \_SB.INTC,
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* 0x00000000
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* },
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*
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* Package (0x04)
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* {
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* 0x0000FFFF,
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* 0x03,
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* \_SB.INTD,
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* 0x00000000
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* }
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* })
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* }
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* }
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*/
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void acpigen_write_pci_GNB_PRT(const struct device *dev)
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{
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const struct pci_routing_info *routing_info =
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get_pci_routing_info(dev->path.pci.devfn);
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if (!routing_info)
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return;
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acpigen_write_method("_PRT", 0);
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/* If (PICM) */
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acpigen_write_if();
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acpigen_emit_namestring("PICM");
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/* Return (Package{...}) */
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acpigen_emit_byte(RETURN_OP);
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acpigen_write_PRT_GSI(routing_info);
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/* Else */
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acpigen_write_else();
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/* Return (Package{...}) */
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acpigen_emit_byte(RETURN_OP);
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acpigen_write_PRT_PIC(routing_info);
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acpigen_pop_len(); /* End Else */
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acpigen_pop_len(); /* Method */
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}
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/*
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* This method writes a PCI _PRT table that uses the FCH IO-APIC / PIC :
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* Name (_PRT, Package (0x04)
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* {
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* Package (0x04)
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* {
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* 0x0000FFFF,
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* 0x00,
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* \_SB.INTA,
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* 0x00000000
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* },
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*
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* Package (0x04)
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* {
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* 0x0000FFFF,
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* 0x01,
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* \_SB.INTB,
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* 0x00000000
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* },
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*
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* Package (0x04)
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* {
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* 0x0000FFFF,
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* 0x02,
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* \_SB.INTC,
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* 0x00000000
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* },
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*
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* Package (0x04)
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* {
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* 0x0000FFFF,
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* 0x03,
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* \_SB.INTD,
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* 0x00000000
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* }
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* })
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*/
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void acpigen_write_pci_FCH_PRT(const struct device *dev)
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{
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const struct pci_routing_info *routing_info =
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get_pci_routing_info(dev->path.pci.devfn);
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if (!routing_info)
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return;
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acpigen_write_name("_PRT");
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acpigen_write_PRT_PIC(routing_info);
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}
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