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soc/intel/cannonlake: Make use of Intel common Graphics block 

TEST=Build and boot cannonlake rvp.

Change-Id: Iaa1314ae3fcb4a8a3b55a314e79511f5dcba163d
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/22617
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Subrata Banik 2017-11-28 18:37:48 +05:30
parent b7b5666110
commit 75c6f4aeb6
2 changed files with 5 additions and 39 deletions
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1
src/soc/intel/cannonlake/Kconfig
View File

@ -51,6 +51,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_EBDA select SOC_INTEL_COMMON_BLOCK_EBDA
select SOC_INTEL_COMMON_BLOCK_FAST_SPI select SOC_INTEL_COMMON_BLOCK_FAST_SPI
select SOC_INTEL_COMMON_BLOCK_GPIO select SOC_INTEL_COMMON_BLOCK_GPIO
select SOC_INTEL_COMMON_BLOCK_GRAPHICS
select SOC_INTEL_COMMON_BLOCK_GSPI select SOC_INTEL_COMMON_BLOCK_GSPI
select SOC_INTEL_COMMON_BLOCK_ITSS select SOC_INTEL_COMMON_BLOCK_ITSS
select SOC_INTEL_COMMON_BLOCK_I2C select SOC_INTEL_COMMON_BLOCK_I2C

43
src/soc/intel/cannonlake/graphics.c
View File

@ -14,29 +14,21 @@
* GNU General Public License for more details. * GNU General Public License for more details.
*/ */
#include <arch/acpi.h>
#include <arch/acpigen.h> #include <arch/acpigen.h>
#include <console/console.h> #include <console/console.h>
#include <fsp/util.h> #include <fsp/util.h>
#include <device/device.h> #include <device/device.h>
#include <device/pci.h> #include <device/pci.h>
#include <device/pci_ids.h>
#include <soc/pci_devs.h>
#include <drivers/intel/gma/opregion.h> #include <drivers/intel/gma/opregion.h>
#include <intelblocks/graphics.h>
uintptr_t fsp_soc_get_igd_bar(void) uintptr_t fsp_soc_get_igd_bar(void)
{ {
device_t dev = SA_DEV_IGD; return graphics_get_memory_base();
/* Check if IGD PCI device is disabled */
if (!dev->enabled)
return 0;
return find_resource(dev, PCI_BASE_ADDRESS_2)->base;
} }
static unsigned long igd_write_opregion(device_t dev, unsigned long current, uintptr_t graphics_soc_write_acpi_opregion(struct device *device,
struct acpi_rsdp *rsdp) uintptr_t current, struct acpi_rsdp *rsdp)
{ {
igd_opregion_t *opregion; igd_opregion_t *opregion;
@ -50,30 +42,3 @@ static unsigned long igd_write_opregion(device_t dev, unsigned long current,
return acpi_align_current(current); return acpi_align_current(current);
} }
static const struct device_operations igd_ops = {
.read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = pci_dev_init,
.write_acpi_tables = igd_write_opregion,
.enable = DEVICE_NOOP
};
static const unsigned short pci_device_ids[] = {
PCI_DEVICE_ID_INTEL_CNL_GT2_ULX_1,
PCI_DEVICE_ID_INTEL_CNL_GT2_ULX_2,
PCI_DEVICE_ID_INTEL_CNL_GT2_ULX_3,
PCI_DEVICE_ID_INTEL_CNL_GT2_ULX_4,
PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_1,
PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_2,
PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_3,
PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_4,
0,
};
static const struct pci_driver integrated_graphics_driver __pci_driver = {
.ops = &igd_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.devices = pci_device_ids,
};