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util/autoport/readme.md: Correct minor inconsistency 

Commit a5072af67d ("util/autoport: Use romstage.c instead of
early_southbridge.c") changed where the SPD map is. Reflect that.

Change-Id: Id0bd1778617371bac5921c4eae63d0beb088216c
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30655
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons 2019-01-04 00:38:43 +01:00 committed by Philipp Deppenwiese
parent 98a917443e
commit 782341dd3a
1 changed files with 1 additions and 1 deletions
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util/autoport/readme.md
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@ -80,7 +80,7 @@ If you're able to use full memory with any combination of inserted modules than
most likely correct. In order to initialize the memory coreboot needs to know RAM timings.
For socketed RAM it's stored in a small EEPROM chip which can be accessed through SPD. Unfortunately
mapping between SPD addresses and RAM slots differs and cannot always be detected automatically.
Resulting SPD map is encoded in function `mainboard_get_spd` in `early_southbridge.c`.
Resulting SPD map is encoded in function `mainboard_get_spd` in `romstage.c`.
autoport uses the most common map `0x50, 0x51, 0x52, 0x53` except for lenovos which are
known to use `0x50, 0x52, 0x51, 0x53`. To detect the correct memory map the easiest way is with
vendor BIOS to boot with just one module in channel 0 slot 0 and then see where does it show