mb/*: Remove SATA_AHCI config from SKL/KBL based devicetrees

SATA_AHCI is already the default mode for SKL/KBL based mainboards.
Therefore, remove its configuration from all related devicetrees.

Built clevo/n130wu with BUILD_TIMELESS=1, coreboot.rom remains
identical.

Change-Id: Ib5222c1b0314365b634f8585e8a97e0054127fe9
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48378
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Singer 2020-12-06 12:20:17 +01:00 committed by Michael Niewöhner
parent d60abfcb74
commit 78c3e1c50a
3 changed files with 0 additions and 3 deletions

View File

@ -80,7 +80,6 @@ chip soc/intel/skylake
device pci 16.3 off end # Management Engine KT Redirection device pci 16.3 off end # Management Engine KT Redirection
device pci 16.4 off end # Management Engine Interface 3 device pci 16.4 off end # Management Engine Interface 3
device pci 17.0 on # SATA device pci 17.0 on # SATA
register "SataMode" = "SATA_AHCI"
register "SataSalpSupport" = "0" register "SataSalpSupport" = "0"
# Ports # Ports
register "SataPortsEnable[0]" = "1" register "SataPortsEnable[0]" = "1"

View File

@ -95,7 +95,6 @@ chip soc/intel/skylake
device pci 16.3 off end # Management Engine KT Redirection device pci 16.3 off end # Management Engine KT Redirection
device pci 16.4 off end # Management Engine Interface 3 device pci 16.4 off end # Management Engine Interface 3
device pci 17.0 on # SATA device pci 17.0 on # SATA
register "SataMode" = "SATA_AHCI"
register "SataSalpSupport" = "1" register "SataSalpSupport" = "1"
register "SataPortsEnable[0]" = "1" register "SataPortsEnable[0]" = "1"
register "SataPortsEnable[1]" = "1" register "SataPortsEnable[1]" = "1"

View File

@ -5,7 +5,6 @@ chip soc/intel/skylake
register "SaGv" = "SaGv_Disabled" register "SaGv" = "SaGv_Disabled"
# SATA configuration # SATA configuration
register "SataMode" = "SATA_AHCI"
register "SataSalpSupport" = "1" register "SataSalpSupport" = "1"
register "SataPortsEnable" = "{ \ register "SataPortsEnable" = "{ \
[0] = 1, \ [0] = 1, \