mb/system76: Leave TBT LSX0 as FSP configured

Do not reconfigured LSX0 so that the FSP values are used.

Change-Id: I76e2ab01a5e853e3c1ac78b471ea0aa87d703d52
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76751
Reviewed-by: Jeremy Soller <jeremy@system76.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Tim Crawford 2023-07-27 10:16:34 -06:00 committed by Felix Held
parent 27830d0ec3
commit 79a372036b
3 changed files with 6 additions and 6 deletions

View File

@ -137,8 +137,8 @@ static const struct pad_config gpio_table[] = {
PAD_NC(GPP_E15, NONE),
PAD_NC(GPP_E16, NONE),
PAD_CFG_GPI(GPP_E17, NONE, DEEP), // BOARD_ID3
PAD_NC(GPP_E18, NATIVE), // TBT_LSX0_TXD
PAD_NC(GPP_E19, NATIVE), // TBT_LSX0_RXD
// GPP_E18 (TBT_LSX0_TXD) configured by FSP
// GPP_E19 (TBT_LSX0_RXD) configured by FSP
PAD_NC(GPP_E20, NONE),
PAD_CFG_GPO(GPP_E21, 0, DEEP), // Strap 14 of 24
PAD_NC(GPP_E22, NONE),

View File

@ -137,8 +137,8 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPO(GPP_E15, 1, DEEP), // CCD_FW_WP#
PAD_CFG_GPO(GPP_E16, 1, DEEP),
PAD_CFG_GPI(GPP_E17, NONE, DEEP), // BOARD_ID3
PAD_NC(GPP_E18, NATIVE), // GPP_E18_TBT_LSX0_TXD
PAD_NC(GPP_E19, NATIVE), // GPP_E19_TBT_LSX0_RXD
// GPP_E18 (TBT_LSX0_TXD) configured by FSP
// GPP_E19 (TBT_LSX0_RXD) configured by FSP
PAD_CFG_GPO(GPP_E20, 1, DEEP),
PAD_CFG_GPO(GPP_E21, 0, DEEP), // GPP_E21
PAD_CFG_GPO(GPP_E22, 1, DEEP),

View File

@ -168,8 +168,8 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPI(GPP_G9, NONE, DEEP), // GPP_G9
PAD_NC(GPP_G10, NONE),
PAD_CFG_GPI(GPP_G11, NONE, DEEP), // GPP_G11
PAD_NC(GPP_G12, NATIVE), // GPP_G12_TBT_LSX_TXD
PAD_NC(GPP_G13, NATIVE), // GPP_G13_TBT_LSX0_RXD
// GPP_G12 (TBT_LSX0_TXD) configured by FSP
// GPP_G13 (TBT_LSX0_RXD) configured by FSP
PAD_NC(GPP_G14, NONE),
PAD_CFG_GPI(GPP_G15, NONE, DEEP), // GPP_G15