src/include: Add guards on all header files

Change-Id: I2d7d4e0b25f2cf3eef2040f89d5ebc711909cdd7
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20734
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
This commit is contained in:
Martin Roth 2017-07-23 21:05:24 -06:00 committed by Stefan Reinauer
parent 284409fd8c
commit 7a4c02145d
7 changed files with 34 additions and 0 deletions

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@ -13,8 +13,13 @@
* GNU General Public License for more details. * GNU General Public License for more details.
*/ */
#ifndef __CPU_AMD_MODEL_10XXX_REV_H__
#define __CPU_AMD_MODEL_10XXX_REV_H__
#include <arch/cpu.h> #include <arch/cpu.h>
int init_processor_name(void); int init_processor_name(void);
/* place holder for Family 10 revision code */ /* place holder for Family 10 revision code */
#endif /* __CPU_AMD_MODEL_10XXX_REV_H__ */

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@ -1,3 +1,6 @@
#ifndef __CPU_AMD_MODEL_FXX_REV_H__
#define __CPU_AMD_MODEL_FXX_REV_H__
#include <arch/cpu.h> #include <arch/cpu.h>
#include <arch/io.h> #include <arch/io.h>
@ -125,3 +128,4 @@ int is_e0_later_in_bsp(int nodeid);
int is_cpu_f0_in_bsp(int nodeid); int is_cpu_f0_in_bsp(int nodeid);
#endif #endif
#endif /* __CPU_AMD_MODEL_FXX_REV_H__ */

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@ -1,4 +1,8 @@
#ifndef __CPU_AMD_SC520_H__
#define __CPU_AMD_SC520_H__
/* handy dandy stuff for the sc520 MMCR */ /* handy dandy stuff for the sc520 MMCR */
/* default location of the MMCR */ /* default location of the MMCR */
#define MMCR 0xfffef000 #define MMCR 0xfffef000
@ -309,3 +313,5 @@ struct mmcr {
#define MMCRDEFAULT ((struct mmcr *) 0xfffef000) #define MMCRDEFAULT ((struct mmcr *) 0xfffef000)
#endif /* __CPU_AMD_SC520_H__ */

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@ -1,3 +1,5 @@
#ifndef __X86_POST_CODE_H__
#define __X86_POST_CODE_H__
#include <console/post_codes.h> #include <console/post_codes.h>
@ -10,3 +12,5 @@
#else #else
#define post_code(value) #define post_code(value)
#endif #endif
#endif /* __X86_POST_CODE_H__ */

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@ -1,3 +1,6 @@
#ifndef __DEVICE_PCI_IDS_H__
#define __DEVICE_PCI_IDS_H__
/* /*
* PCI Class, Vendor and Device IDs * PCI Class, Vendor and Device IDs
* *
@ -3078,3 +3081,5 @@
#define PCI_DEVICE_ID_AMD_VIPER_7412 0x7412 #define PCI_DEVICE_ID_AMD_VIPER_7412 0x7412
/* END OLDER USAGE */ /* END OLDER USAGE */
#endif /* __DEVICE_PCI_IDS_H__ */

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@ -14,6 +14,9 @@
* GNU General Public License for more details. * GNU General Public License for more details.
*/ */
#ifndef __SPD_DDR2_H__
#define __SPD_DDR2_H__
/* SPDs for DDR2 SDRAM */ /* SPDs for DDR2 SDRAM */
#define SPD_MEM_TYPE 2 #define SPD_MEM_TYPE 2
#define SPD_MEM_TYPE_SDRAM_DDR 0x07 #define SPD_MEM_TYPE_SDRAM_DDR 0x07
@ -111,3 +114,5 @@
#define SPD_TRFC 42 #define SPD_TRFC 42
#define SPD_TREF 12 #define SPD_TREF 12
#endif /* __SPD_DDR2_H__ */

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@ -1 +1,6 @@
#ifndef __SYS_TYPES_H__
#define __SYS_TYPES_H__
#include "../types.h" #include "../types.h"
#endif /* __SYS_TYPES_H__ */