lib/spd_bin: add get_spd_sn function
This patch adds the get_spd_sn function. It's for reading SODIMM serial number. In spd_cache implementation it can use to get serial number before reading whole SPD by smbus. BUG=b:146457985 BRANCH=None TEST=Wrote sample code to get the serial number and ran on puff. It can get the serial number correctly. Change-Id: I406bba7cc56debbd9851d430f069e4fb96ec937c Signed-off-by: Jamie Chen <jamie.chen@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40414 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -21,16 +21,19 @@
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#define SPD_DRAM_LPDDR5 0x13
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#define SPD_DRAM_LPDDR5 0x13
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#define SPD_DENSITY_BANKS 4
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#define SPD_DENSITY_BANKS 4
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#define SPD_ADDRESSING 5
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#define SPD_ADDRESSING 5
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#define SPD_SN_LEN 4
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#define DDR3_ORGANIZATION 7
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#define DDR3_ORGANIZATION 7
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#define DDR3_BUS_DEV_WIDTH 8
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#define DDR3_BUS_DEV_WIDTH 8
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#define DDR4_ORGANIZATION 12
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#define DDR4_ORGANIZATION 12
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#define DDR4_BUS_DEV_WIDTH 13
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#define DDR4_BUS_DEV_WIDTH 13
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#define DDR3_SPD_PART_OFF 128
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#define DDR3_SPD_PART_OFF 128
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#define DDR3_SPD_PART_LEN 18
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#define DDR3_SPD_PART_LEN 18
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#define DDR3_SPD_SN_OFF 122
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#define LPDDR3_SPD_PART_OFF 128
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#define LPDDR3_SPD_PART_OFF 128
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#define LPDDR3_SPD_PART_LEN 18
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#define LPDDR3_SPD_PART_LEN 18
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#define DDR4_SPD_PART_OFF 329
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#define DDR4_SPD_PART_OFF 329
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#define DDR4_SPD_PART_LEN 20
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#define DDR4_SPD_PART_LEN 20
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#define DDR4_SPD_SN_OFF 325
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struct spd_block {
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struct spd_block {
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u8 addr_map[CONFIG_DIMM_MAX]; /* 7 bit I2C addresses */
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u8 addr_map[CONFIG_DIMM_MAX]; /* 7 bit I2C addresses */
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@ -45,6 +48,13 @@ int get_spd_cbfs_rdev(struct region_device *spd_rdev, u8 spd_index);
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void dump_spd_info(struct spd_block *blk);
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void dump_spd_info(struct spd_block *blk);
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void get_spd_smbus(struct spd_block *blk);
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void get_spd_smbus(struct spd_block *blk);
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/*
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* get_spd_sn returns the SODIMM serial number. It only supports DDR3 and DDR4.
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* return CB_SUCCESS, sn is the serial number and sn=0xffffffff if the dimm is not present.
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* return CB_ERR, if dram_type is not supported or addr is a zero.
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*/
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enum cb_err get_spd_sn(u8 addr, u32 *sn);
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/* expects SPD size to be 128 bytes, reads from "spd.bin" in CBFS and
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/* expects SPD size to be 128 bytes, reads from "spd.bin" in CBFS and
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verifies the checksum. Only available if CONFIG_DIMM_SPD_SIZE == 128. */
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verifies the checksum. Only available if CONFIG_DIMM_SPD_SIZE == 128. */
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int read_ddr3_spd_from_cbfs(u8 *buf, int idx);
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int read_ddr3_spd_from_cbfs(u8 *buf, int idx);
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@ -79,3 +79,51 @@ void get_spd_smbus(struct spd_block *blk)
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update_spd_len(blk);
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update_spd_len(blk);
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}
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}
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/*
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* get_spd_sn returns the SODIMM serial number. It only supports DDR3 and DDR4.
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* return CB_SUCCESS, sn is the serial number and sn=0xffffffff if the dimm is not present.
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* return CB_ERR, if dram_type is not supported or addr is a zero.
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*/
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enum cb_err get_spd_sn(u8 addr, u32 *sn)
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{
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u8 i;
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u8 dram_type;
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int smbus_ret;
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/* addr is not a zero. */
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if (addr == 0x0)
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return CB_ERR;
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/* If dimm is not present, set sn to 0xff. */
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smbus_ret = do_smbus_read_byte(SMBUS_IO_BASE, addr, SPD_DRAM_TYPE);
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if (smbus_ret < 0) {
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printk(BIOS_INFO, "No memory dimm at address %02X\n", addr);
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*sn = 0xffffffff;
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return CB_SUCCESS;
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}
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dram_type = smbus_ret & 0xff;
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/* Check if module is DDR4, DDR4 spd is 512 byte. */
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if (dram_type == SPD_DRAM_DDR4 && CONFIG_DIMM_SPD_SIZE > SPD_PAGE_LEN) {
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/* Switch to page 1 */
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do_smbus_write_byte(SMBUS_IO_BASE, SPD_PAGE_1, 0, 0);
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for (i = 0; i < SPD_SN_LEN; i++)
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*((u8 *)sn + i) = do_smbus_read_byte(SMBUS_IO_BASE, addr,
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i + DDR4_SPD_SN_OFF);
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/* Restore to page 0 */
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do_smbus_write_byte(SMBUS_IO_BASE, SPD_PAGE_0, 0, 0);
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} else if (dram_type == SPD_DRAM_DDR3) {
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for (i = 0; i < SPD_SN_LEN; i++)
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*((u8 *)sn + i) = do_smbus_read_byte(SMBUS_IO_BASE, addr,
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i + DDR3_SPD_SN_OFF);
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} else {
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printk(BIOS_ERR, "Unsupported dram_type\n");
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return CB_ERR;
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}
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return CB_SUCCESS;
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}
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