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lib/spd_bin: add get_spd_sn function 

This patch adds the get_spd_sn function. It's for reading SODIMM serial
number. In spd_cache implementation it can use to get serial number
before reading whole SPD by smbus.

BUG=b:146457985
BRANCH=None
TEST=Wrote sample code to get the serial number and ran on puff.
     It can get the serial number correctly.

Change-Id: I406bba7cc56debbd9851d430f069e4fb96ec937c
Signed-off-by: Jamie Chen <jamie.chen@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40414
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Jamie Chen 2020-04-16 01:20:29 +08:00 committed by Patrick Georgi
parent 7d1a4b2584
commit 7adcfde079
2 changed files with 58 additions and 0 deletions
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10
src/include/spd_bin.h
View File

@ -21,16 +21,19 @@
#define SPD_DRAM_LPDDR5 0x13
#define SPD_DENSITY_BANKS 4
#define SPD_ADDRESSING 5
#define SPD_SN_LEN 4
#define DDR3_ORGANIZATION 7
#define DDR3_BUS_DEV_WIDTH 8
#define DDR4_ORGANIZATION 12
#define DDR4_BUS_DEV_WIDTH 13
#define DDR3_SPD_PART_OFF 128
#define DDR3_SPD_PART_LEN 18
#define DDR3_SPD_SN_OFF 122
#define LPDDR3_SPD_PART_OFF 128
#define LPDDR3_SPD_PART_LEN 18
#define DDR4_SPD_PART_OFF 329
#define DDR4_SPD_PART_LEN 20
#define DDR4_SPD_SN_OFF 325
struct spd_block {
u8 addr_map[CONFIG_DIMM_MAX]; /* 7 bit I2C addresses */
@ -45,6 +48,13 @@ int get_spd_cbfs_rdev(struct region_device *spd_rdev, u8 spd_index);
void dump_spd_info(struct spd_block *blk);
void get_spd_smbus(struct spd_block *blk);
/*
* get_spd_sn returns the SODIMM serial number. It only supports DDR3 and DDR4.
* return CB_SUCCESS, sn is the serial number and sn=0xffffffff if the dimm is not present.
* return CB_ERR, if dram_type is not supported or addr is a zero.
*/
enum cb_err get_spd_sn(u8 addr, u32 *sn);
/* expects SPD size to be 128 bytes, reads from "spd.bin" in CBFS and
verifies the checksum. Only available if CONFIG_DIMM_SPD_SIZE == 128. */
int read_ddr3_spd_from_cbfs(u8 *buf, int idx);

48
src/soc/intel/common/block/smbus/smbuslib.c
View File

@ -79,3 +79,51 @@ void get_spd_smbus(struct spd_block *blk)
update_spd_len(blk);
}
/*
* get_spd_sn returns the SODIMM serial number. It only supports DDR3 and DDR4.
* return CB_SUCCESS, sn is the serial number and sn=0xffffffff if the dimm is not present.
* return CB_ERR, if dram_type is not supported or addr is a zero.
*/
enum cb_err get_spd_sn(u8 addr, u32 *sn)
{
u8 i;
u8 dram_type;
int smbus_ret;
/* addr is not a zero. */
if (addr == 0x0)
return CB_ERR;
/* If dimm is not present, set sn to 0xff. */
smbus_ret = do_smbus_read_byte(SMBUS_IO_BASE, addr, SPD_DRAM_TYPE);
if (smbus_ret < 0) {
printk(BIOS_INFO, "No memory dimm at address %02X\n", addr);
*sn = 0xffffffff;
return CB_SUCCESS;
}
dram_type = smbus_ret & 0xff;
/* Check if module is DDR4, DDR4 spd is 512 byte. */
if (dram_type == SPD_DRAM_DDR4 && CONFIG_DIMM_SPD_SIZE > SPD_PAGE_LEN) {
/* Switch to page 1 */
do_smbus_write_byte(SMBUS_IO_BASE, SPD_PAGE_1, 0, 0);
for (i = 0; i < SPD_SN_LEN; i++)
*((u8 *)sn + i) = do_smbus_read_byte(SMBUS_IO_BASE, addr,
i + DDR4_SPD_SN_OFF);
/* Restore to page 0 */
do_smbus_write_byte(SMBUS_IO_BASE, SPD_PAGE_0, 0, 0);
} else if (dram_type == SPD_DRAM_DDR3) {
for (i = 0; i < SPD_SN_LEN; i++)
*((u8 *)sn + i) = do_smbus_read_byte(SMBUS_IO_BASE, addr,
i + DDR3_SPD_SN_OFF);
} else {
printk(BIOS_ERR, "Unsupported dram_type\n");
return CB_ERR;
}
return CB_SUCCESS;
}