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soc/intel/common: add SGX fields to GNVS 

Add the SGX fields to the GNVS. This is required for Skylake to use the
common GNVS.

Change-Id: I0077260b7eb1bc2b2fe2af69ac039b38ca0e7423
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57947
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
This commit is contained in:
Michael Niewöhner 2021-09-26 22:04:11 +02:00
parent 5bb6f9b794
commit 7b34e319f2
2 changed files with 7 additions and 0 deletions
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3
src/soc/intel/common/block/acpi/acpi/globalnvs.asl
View File

@ -25,4 +25,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
A4GB, 64, // 0x30 - 0x37 Base of above 4GB MMIO Resource A4GB, 64, // 0x30 - 0x37 Base of above 4GB MMIO Resource
A4GS, 64, // 0x38 - 0x3f Length of above 4GB MMIO Resource A4GS, 64, // 0x38 - 0x3f Length of above 4GB MMIO Resource
, 64, // 0x40 - 0x47 Hest log buffer (used in SMM, not ASL code) , 64, // 0x40 - 0x47 Hest log buffer (used in SMM, not ASL code)
EPCS, 8, // 0x48 - SGX enabled status
EMNA, 64, // 0x49 - 0x50 EPC base address
ELNG, 64, // 0x51 - 0x58 EPC length
} }

4
src/soc/intel/common/block/include/intelblocks/nvs.h
View File

@ -27,6 +27,10 @@ struct __packed global_nvs {
u64 a4gb; /* 0x30 - 0x37 Base of above 4GB MMIO Resource */ u64 a4gb; /* 0x30 - 0x37 Base of above 4GB MMIO Resource */
u64 a4gs; /* 0x38 - 0x3f Length of above 4GB MMIO Resource */ u64 a4gs; /* 0x38 - 0x3f Length of above 4GB MMIO Resource */
u64 hest_log_addr; /* 0x40 - 47 err log addr (used in SMM, not ASL code) */ u64 hest_log_addr; /* 0x40 - 47 err log addr (used in SMM, not ASL code) */
/* SGX */
u8 epcs; /* 0x48 - SGX enabled status */
u64 emna; /* 0x49 - 0x50 EPC base address */
u64 elng; /* 0x51 - 0x58 EPC length */
}; };
#endif #endif