mainboard/google: Update the TLMM registers for sdhc

Update the TLMM register values for eMMC and SD card on Trogdor,
Herobrine and Mistral boards.

BUG=b:196936525
TEST=Validated on qualcomm sc7280 and sc7180 development board and checked
basic boot up.

Signed-off-by: Shaik Sajida Bhanu <sbhanu@codeaurora.org>
Change-Id: Iccdb7757027c6de424a82e4374bad802501ac83c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57450
Reviewed-by: Shelley Chen <shchen@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Shaik Sajida Bhanu 2021-08-30 12:09:46 +05:30 committed by Julius Werner
parent e3cf008d88
commit 7bf3d0cbd8
6 changed files with 41 additions and 0 deletions

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@ -6,15 +6,25 @@
#include <soc/clock.h>
#include <console/console.h>
#include <device/device.h>
#include <device/mmio.h>
#include <bootblock_common.h>
#include <soc/clock.h>
static void configure_sdhci(void)
{
/* Program eMMC drive strength to 16/10/10 mA */
write32((void *)SDC1_TLMM_CFG_ADDR, 0x9FE4);
/* Program SD card drive strength to 16/10/10 mA */
write32((void *)SDC2_TLMM_CFG_ADDR, 0x1FE4);
}
static void mainboard_init(struct device *dev)
{
/* Configure clock for eMMC */
clock_configure_sdcc(1, 384 * MHz);
/* Configure clock for SD card */
clock_configure_sdcc(2, 50 * MHz);
configure_sdhci();
}
static void mainboard_enable(struct device *dev)

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@ -1,8 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <device/device.h>
#include <device/mmio.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include <soc/usb.h>
#include <soc/addressmap.h>
static struct usb_board_data usb1_board_data = {
.parameter_override_x0 = 0x63,
@ -17,6 +19,12 @@ static void setup_usb(void)
setup_usb_host(HSUSB_HS_PORT_1, &usb1_board_data);
}
static void configure_sdhci(void)
{
/* Program eMMC drive strength to 16/10/10 mA */
write32((void *)SDC1_TLMM_CFG_ADDR, 0x9FE4);
}
static void mainboard_init(struct device *dev)
{
/* Copy WIFI calibration data into CBMEM. */
@ -24,6 +32,7 @@ static void mainboard_init(struct device *dev)
cbmem_add_vpd_calibration_data();
setup_usb();
configure_sdhci();
}
static void mainboard_enable(struct device *dev)

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@ -6,6 +6,7 @@
#include <delay.h>
#include <device/device.h>
#include <device/i2c_simple.h>
#include <device/mmio.h>
#include <mipi/panel.h>
#include <drivers/ti/sn65dsi86bridge/sn65dsi86bridge.h>
#include <edid.h>
@ -19,6 +20,7 @@
#include <types.h>
#include "board.h"
#include <soc/addressmap.h>
#define BRIDGE_BUS 0x2
#define BRIDGE_CHIP 0x2d
@ -202,6 +204,14 @@ static void display_startup(void)
}
}
static void configure_sdhci(void)
{
/* Program eMMC drive strength to 16/16/16 mA */
write32((void *)SDC1_TLMM_CFG_ADDR, 0x9FFF);
/* Program SD card drive strength to 16/10/10 mA */
write32((void *)SDC2_TLMM_CFG_ADDR, 0x1FE4);
}
static void mainboard_init(struct device *dev)
{
/* Take FPMCU out of reset. Power was already applied
@ -213,6 +223,7 @@ static void mainboard_init(struct device *dev)
qi2s_configure_gpios();
load_qup_fw();
display_startup();
configure_sdhci();
}
static void mainboard_enable(struct device *dev)

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@ -9,4 +9,7 @@
#define TLMM_SOUTH_TILE_BASE 0x1000000
#define GCC_BASE 0x01800000
/* SDHC TLMM Registers */
#define SDC1_TLMM_CFG_ADDR 0x010C2000
#endif /* __SOC_QUALCOMM_QCS405_ADDRESS_MAP_H__ */

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@ -56,4 +56,8 @@
#define GPIO_FUNC_QSPI_DATA_1 GPIO65_FUNC_QSPI_DATA_1
#define GPIO_FUNC_QSPI_CLK GPIO63_FUNC_QSPI_CLK
/* SDHC TLMM Registers */
#define SDC1_TLMM_CFG_ADDR 0x03D7A000
#define SDC2_TLMM_CFG_ADDR 0x03D7B000
#endif /* __SOC_QUALCOMM_SC7180_ADDRESS_MAP_H__ */

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@ -24,4 +24,8 @@
#define GPIO_FUNC_QSPI_DATA_1 GPIO13_FUNC_QSPI_DATA_1
#define GPIO_FUNC_QSPI_CLK GPIO14_FUNC_QSPI_CLK
/* SDHC TLMM Registers */
#define SDC1_TLMM_CFG_ADDR 0x0F1B3000
#define SDC2_TLMM_CFG_ADDR 0x0F1B4000
#endif /* __SOC_QUALCOMM_SC7280_ADDRESS_MAP_H__ */