soc/mediatek/mt8186: Add I2C driver support
Add I2C controller drivers. TEST=build pass BUG=b:202871018 Signed-off-by: Housong Zhang <housong.zhang@mediatek.corp-partner.google.com> Change-Id: Ia3800e3a30b0796a64213d3b1ab688580c6ddbca Reviewed-on: https://review.coreboot.org/c/coreboot/+/59296 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
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@ -6,6 +6,7 @@ bootblock-y += ../common/eint_event.c
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bootblock-y += ../common/flash_controller.c
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bootblock-y += gic.c
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bootblock-y += ../common/gpio.c gpio.c
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bootblock-y += ../common/i2c.c i2c.c
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bootblock-y += ../common/mmu_operations.c
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bootblock-y += ../common/pll.c pll.c
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bootblock-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
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@ -16,6 +17,7 @@ bootblock-y += ../common/wdt.c wdt.c
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verstage-y += ../common/auxadc.c
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verstage-y += ../common/flash_controller.c
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verstage-y += ../common/gpio.c gpio.c
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verstage-y += ../common/i2c.c i2c.c
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verstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
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verstage-y += ../common/timer.c timer.c
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verstage-y += ../common/uart.c
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@ -26,6 +28,7 @@ romstage-y += ../common/cbmem.c
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romstage-y += emi.c
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romstage-y += ../common/flash_controller.c
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romstage-y += ../common/gpio.c gpio.c
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romstage-y += ../common/i2c.c i2c.c
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romstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c
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romstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
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romstage-y += ../common/timer.c timer.c
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@ -37,6 +40,7 @@ ramstage-y += ../common/auxadc.c
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ramstage-y += emi.c
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ramstage-y += ../common/flash_controller.c
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ramstage-y += ../common/gpio.c gpio.c
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ramstage-y += ../common/i2c.c i2c.c
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ramstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c
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ramstage-$(CONFIG_COMMONLIB_STORAGE_MMC) += ../common/msdc.c msdc.c
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ramstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
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@ -0,0 +1,143 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* This file is created based on MT8186 Functional Specification
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* Chapter number: 5.10
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*/
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#include <assert.h>
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#include <console/console.h>
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#include <device/mmio.h>
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#include <device/i2c_simple.h>
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#include <soc/i2c.h>
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#include <soc/gpio.h>
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#include <timer.h>
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struct mtk_i2c mtk_i2c_bus_controller[] = {
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[0] = {
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.i2c_regs = (void *)(I2C0_BASE),
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.i2c_dma_regs = (void *)(I2C0_DMA_BASE),
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},
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[1] = {
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.i2c_regs = (void *)(I2C1_BASE),
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.i2c_dma_regs = (void *)(I2C1_DMA_BASE),
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},
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[2] = {
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.i2c_regs = (void *)(I2C2_BASE),
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.i2c_dma_regs = (void *)(I2C2_DMA_BASE),
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},
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[3] = {
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.i2c_regs = (void *)(I2C3_BASE),
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.i2c_dma_regs = (void *)(I2C3_DMA_BASE),
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},
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[4] = {
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.i2c_regs = (void *)(I2C4_BASE),
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.i2c_dma_regs = (void *)(I2C4_DMA_BASE),
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},
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[5] = {
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.i2c_regs = (void *)(I2C5_BASE),
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.i2c_dma_regs = (void *)(I2C5_DMA_BASE),
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},
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[6] = {
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.i2c_regs = (void *)(I2C6_BASE),
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.i2c_dma_regs = (void *)(I2C6_DMA_BASE),
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},
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[7] = {
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.i2c_regs = (void *)(I2C7_BASE),
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.i2c_dma_regs = (void *)(I2C7_DMA_BASE),
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},
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[8] = {
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.i2c_regs = (void *)(I2C8_BASE),
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.i2c_dma_regs = (void *)(I2C8_DMA_BASE),
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},
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[9] = {
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.i2c_regs = (void *)(I2C9_BASE),
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.i2c_dma_regs = (void *)(I2C9_DMA_BASE),
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},
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};
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_Static_assert(ARRAY_SIZE(mtk_i2c_bus_controller) == I2C_BUS_NUMBER,
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"Wrong size of mtk_i2c_bus_controller");
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struct pad_func {
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gpio_t gpio;
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u8 func;
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};
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#define PAD_FUNC(name, func) {GPIO(name), PAD_##name##_FUNC_##func}
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static const struct pad_func i2c_funcs[I2C_BUS_NUMBER][2] = {
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[0] = {
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PAD_FUNC(SDA0, SDA0),
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PAD_FUNC(SCL0, SCL0),
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},
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[1] = {
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PAD_FUNC(SDA1, SDA1),
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PAD_FUNC(SCL1, SCL1),
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},
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[2] = {
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PAD_FUNC(SDA2, SDA2),
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PAD_FUNC(SCL2, SCL2),
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},
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[3] = {
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PAD_FUNC(SDA3, SDA3),
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PAD_FUNC(SCL3, SCL3),
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},
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[4] = {
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PAD_FUNC(SDA4, SDA4),
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PAD_FUNC(SCL4, SCL4),
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},
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[5] = {
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PAD_FUNC(SDA5, SDA5),
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PAD_FUNC(SCL5, SCL5),
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},
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[6] = {
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PAD_FUNC(SDA6, SDA6),
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PAD_FUNC(SCL6, SCL6),
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},
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[7] = {
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PAD_FUNC(SDA7, SDA7),
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PAD_FUNC(SCL7, SCL7),
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},
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[8] = {
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PAD_FUNC(SDA8, SDA8),
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PAD_FUNC(SCL8, SCL8),
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},
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[9] = {
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PAD_FUNC(SDA9, SDA9),
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PAD_FUNC(SCL9, SCL9),
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},
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};
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static void mtk_i2c_set_gpio_pinmux(uint8_t bus)
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{
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assert(bus < I2C_BUS_NUMBER);
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const struct pad_func *ptr = i2c_funcs[bus];
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for (size_t i = 0; i < 2; i++) {
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gpio_set_mode(ptr[i].gpio, ptr[i].func);
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gpio_set_pull(ptr[i].gpio, GPIO_PULL_ENABLE, GPIO_PULL_UP);
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}
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}
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void mtk_i2c_bus_init(uint8_t bus, uint32_t speed)
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{
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mtk_i2c_speed_init(bus, speed);
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mtk_i2c_set_gpio_pinmux(bus);
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}
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void mtk_i2c_dump_more_info(struct mt_i2c_regs *regs)
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{
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printk(BIOS_DEBUG, "LTIMING %x\nCLK_DIV %x\n",
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read32(®s->ltiming),
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read32(®s->clock_div));
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}
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void mtk_i2c_config_timing(struct mt_i2c_regs *regs, struct mtk_i2c *bus_ctrl)
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{
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write32(®s->clock_div, bus_ctrl->ac_timing.inter_clk_div);
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write32(®s->timing, bus_ctrl->ac_timing.htiming);
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write32(®s->ltiming, bus_ctrl->ac_timing.ltiming);
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write32(®s->hs, bus_ctrl->ac_timing.hs);
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write32(®s->ext_conf, bus_ctrl->ac_timing.ext);
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}
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@ -0,0 +1,70 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* This file is created based on MT8186 Functional Specification
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* Chapter number: 5.10
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*/
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#ifndef SOC_MEDIATEK_MT8186_I2C_H
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#define SOC_MEDIATEK_MT8186_I2C_H
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#include <soc/i2c_common.h>
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#include <soc/pll.h>
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/* I2C Register */
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struct mt_i2c_regs {
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uint32_t data_port;
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uint32_t slave_addr;
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uint32_t intr_mask;
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uint32_t intr_stat;
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uint32_t control;
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uint32_t transfer_len;
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uint32_t transac_len;
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uint32_t delay_len;
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uint32_t timing;
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uint32_t start;
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uint32_t ext_conf;
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uint32_t ltiming;
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uint32_t hs;
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uint32_t io_config;
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uint32_t fifo_addr_clr;
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uint32_t reserved0[2];
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uint32_t transfer_aux_len;
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uint32_t clock_div;
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uint32_t time_out;
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uint32_t softreset;
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uint32_t reserved1[36];
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uint32_t debug_stat;
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uint32_t debug_ctrl;
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uint32_t reserved2[2];
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uint32_t fifo_stat;
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uint32_t fifo_thresh;
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uint32_t reserved3[932];
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uint32_t multi_dma;
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uint32_t reserved4[2];
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uint32_t rollback;
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};
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/* I2C ID Number*/
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enum {
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I2C0,
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I2C1,
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I2C2,
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I2C3,
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I2C4,
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I2C5,
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I2C6,
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I2C7,
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I2C8,
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I2C9,
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};
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#define I2C_BUS_NUMBER 10
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#define MAX_CLOCK_DIV 32
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#define I2C_CLK_HZ (UNIV2PLL_HZ / 20)
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check_member(mt_i2c_regs, multi_dma, 0xf8c);
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void mtk_i2c_bus_init(uint8_t bus, uint32_t speed);
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#endif /* SOC_MEDIATEK_MT8186_I2C_H */
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