mb/google/rex: Enable EC
Perform EC initialization in bootblock and ramstages. Add associated ACPI configuration. BUG=b:224325352 TEST=util/abuild/abuild -p none -t google/rex -a -c max Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I2ea934f32b34bc43650e20dd2736f4e652004dc2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64622 Reviewed-by: Tarun Tuli <taruntuli@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Eric Lai
Subrata Banik
parent
7a294be356
commit
7c304f8d34
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@ -7,6 +7,8 @@ config BOARD_GOOGLE_REX_COMMON
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config BOARD_GOOGLE_BASEBOARD_REX
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def_bool n
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select BOARD_GOOGLE_REX_COMMON
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select EC_GOOGLE_CHROMEEC
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select EC_GOOGLE_CHROMEEC_ESPI
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select SOC_INTEL_METEORLAKE
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select SYSTEM_TYPE_LAPTOP
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@ -19,6 +21,10 @@ config BASEBOARD_DIR
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string
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default "rex" if BOARD_GOOGLE_BASEBOARD_REX
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config CHROMEOS
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select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC
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select VBOOT_LID_SWITCH
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config DEVICETREE
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default "variants/baseboard/\$(CONFIG_BASEBOARD_DIR)/devicetree.cb"
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@ -3,6 +3,7 @@ bootblock-y += bootblock.c
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romstage-y += romstage.c
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ramstage-y += mainboard.c
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ramstage-y += ec.c
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VARIANT_DIR:=$(call strip_quotes,$(CONFIG_VARIANT_DIR))
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BASEBOARD_DIR:=$(call strip_quotes,$(CONFIG_BASEBOARD_DIR))
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@ -1,6 +1,7 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <acpi/acpi.h>
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#include <variant/ec.h>
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DefinitionBlock(
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"dsdt.aml",
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@ -31,4 +32,13 @@ DefinitionBlock(
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/* Chipset specific sleep states */
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#include <southbridge/intel/common/acpi/sleepstates.asl>
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/* Chrome OS Embedded Controller */
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Scope (\_SB.PCI0.LPCB)
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{
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/* ACPI code for EC SuperIO functions */
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#include <ec/google/chromeec/acpi/superio.asl>
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/* ACPI code for EC functions */
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#include <ec/google/chromeec/acpi/ec.asl>
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}
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}
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@ -0,0 +1,22 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <acpi/acpi.h>
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#include <console/console.h>
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#include <ec/ec.h>
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#include <ec/google/chromeec/ec.h>
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#include <variant/ec.h>
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void mainboard_ec_init(void)
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{
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static const struct google_chromeec_event_info info = {
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.log_events = MAINBOARD_EC_LOG_EVENTS,
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.sci_events = MAINBOARD_EC_SCI_EVENTS,
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.s3_wake_events = MAINBOARD_EC_S3_WAKE_EVENTS,
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.s5_wake_events = MAINBOARD_EC_S5_WAKE_EVENTS,
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.s0ix_wake_events = MAINBOARD_EC_S0IX_WAKE_EVENTS,
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};
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printk(BIOS_DEBUG, "mainboard: EC init\n");
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google_chromeec_events_init(&info, acpi_is_wakeup_s3());
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}
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@ -2,6 +2,7 @@
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#include <baseboard/variants.h>
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#include <device/device.h>
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#include <ec/ec.h>
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static void mainboard_init(void *chip_info)
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{
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@ -10,10 +11,14 @@ static void mainboard_init(void *chip_info)
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pads = variant_gpio_table(&num);
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gpio_configure_pads(pads, num);
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}
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static void mainboard_dev_init(struct device *dev)
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{
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mainboard_ec_init();
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}
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static void mainboard_enable(struct device *dev)
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{
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/* TODO: Enable mainboard */
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dev->ops->init = mainboard_dev_init;
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}
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struct chip_operations mainboard_ops = {
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@ -0,0 +1,76 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#ifndef __BASEBOARD_EC_H__
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#define __BASEBOARD_EC_H__
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#include <ec/ec.h>
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#include <ec/google/chromeec/ec_commands.h>
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#include <baseboard/gpio.h>
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#define MAINBOARD_EC_SCI_EVENTS \
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(EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_CLOSED) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_CONNECTED) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_DISCONNECTED) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_LOW) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_CRITICAL) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_STATUS) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_THERMAL_THRESHOLD) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_THROTTLE_START) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_THROTTLE_STOP) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_USB_CHARGER) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_MKBP) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_PD_MCU) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_USB_MUX))
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#define MAINBOARD_EC_SMI_EVENTS \
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(EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_CLOSED))
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/* EC can wake from S5 with lid or power button */
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#define MAINBOARD_EC_S5_WAKE_EVENTS \
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(EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_POWER_BUTTON))
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/*
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* EC can wake from S3/S0ix with:
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* 1. Lid open
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* 2. AC Connect/Disconnect
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* 3. Power button
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* 4. Key press
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* 5. Mode change
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*/
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#define MAINBOARD_EC_S3_WAKE_EVENTS \
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(MAINBOARD_EC_S5_WAKE_EVENTS |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_CONNECTED) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_DISCONNECTED) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEY_PRESSED) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE))
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#define MAINBOARD_EC_S0IX_WAKE_EVENTS \
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(MAINBOARD_EC_S3_WAKE_EVENTS |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_USB_MUX) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_HANG_DETECT))
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/* Log EC wake events plus EC shutdown events */
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#define MAINBOARD_EC_LOG_EVENTS \
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(EC_HOST_EVENT_MASK(EC_HOST_EVENT_THERMAL_SHUTDOWN) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_SHUTDOWN) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_PANIC))
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/*
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* ACPI related definitions for ASL code.
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*/
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/* Enable EC backed ALS device in ACPI */
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#define EC_ENABLE_ALS_DEVICE
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/* Enable Keyboard Backlight */
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#define EC_ENABLE_KEYBOARD_BACKLIGHT
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/* Enable MKBP for buttons and switches */
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#define EC_ENABLE_MKBP_DEVICE
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/* Enable LID switch and provide wake pin for EC */
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#define EC_ENABLE_LID_SWITCH
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#define EC_ENABLE_WAKE_PIN GPE_EC_WAKE
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/* Enable EC backed PD MCU device in ACPI */
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#define EC_ENABLE_PD_MCU_DEVICE
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#define SIO_EC_MEMMAP_ENABLE /* EC Memory Map Resources */
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#define SIO_EC_HOST_ENABLE /* EC Host Interface Resources */
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#define SIO_EC_ENABLE_PS2K /* Enable PS/2 Keyboard */
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#define EC_ENABLE_SYNC_IRQ /* Enable tight timestamp / wake support */
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#endif /* __BASEBOARD_EC_H__ */
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@ -6,4 +6,11 @@
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#include <soc/gpe.h>
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#include <soc/gpio.h>
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/* GPIO IRQ for tight timestamps / wake support */
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#define EC_SYNC_IRQ 0
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/* eSPI virtual wire reporting */
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#define EC_SCI_GPI GPE0_ESPI
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/* EC wake is LAN_WAKE# which is a special DeepSX wake pin */
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#define GPE_EC_WAKE GPE0_LAN_WAK
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#endif /* __BASEBOARD_GPIO_H__ */
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@ -0,0 +1,8 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#ifndef MAINBOARD_EC_H
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#define MAINBOARD_EC_H
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#include <baseboard/ec.h>
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#endif /* MAINBOARD_GPIO_H */
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@ -5,4 +5,6 @@
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#include <baseboard/gpio.h>
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/* TODO: Add GPIO as per rex board */
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#endif /* __MAINBOARD_GPIO_H__ */
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