cpu/x86/lapic: Do not set read-only bits in LVTx
The bits REMOTE_IRR and SEND_PENDING are documented as read-only, and reserved bits should not be modified either. Change-Id: I6bcb9eb990debe169340a0bfe662158b62a8f4dc Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55700 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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@ -52,16 +52,12 @@ static void lapic_virtual_wire_mode_init(void)
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lapic_update32(LAPIC_SPIV, ~LAPIC_VECTOR_MASK, LAPIC_SPIV_ENABLE);
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lapic_update32(LAPIC_SPIV, ~LAPIC_VECTOR_MASK, LAPIC_SPIV_ENABLE);
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/* Put the local APIC in virtual wire mode */
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/* Put the local APIC in virtual wire mode */
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uint32_t mask = LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER | LAPIC_LVT_REMOTE_IRR |
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uint32_t mask = LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER | LAPIC_INPUT_POLARITY |
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LAPIC_INPUT_POLARITY | LAPIC_SEND_PENDING | LAPIC_LVT_RESERVED_1 |
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LAPIC_DELIVERY_MODE_MASK;
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LAPIC_DELIVERY_MODE_MASK;
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lapic_update32(LAPIC_LVT0, ~mask, LAPIC_LVT_REMOTE_IRR | LAPIC_SEND_PENDING |
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lapic_update32(LAPIC_LVT0, ~mask, LAPIC_DELIVERY_MODE_EXTINT);
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LAPIC_DELIVERY_MODE_EXTINT);
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lapic_update32(LAPIC_LVT1, ~mask, LAPIC_LVT_REMOTE_IRR | LAPIC_SEND_PENDING |
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LAPIC_DELIVERY_MODE_NMI);
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lapic_update32(LAPIC_LVT1, ~mask, LAPIC_DELIVERY_MODE_NMI);
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}
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}
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void setup_lapic(void)
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void setup_lapic(void)
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