util/spd_tools: Add MT53E1G32D2NP-046 WT:B LPDDR4 config
The revision B version of the MT53E1G32D2NP-046 memory chip will be used in the next guybrush build. It has a different internal layout than the Revision A part, with 2 ZQ lines per module instead of 1. BUG=b:186027256 TEST=Build only Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: I066f40eb890648a9be17cfe0cee20d299000c11a Reviewed-on: https://review.coreboot.org/c/coreboot/+/52586 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
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@ -60,6 +60,18 @@
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"speedMbps": 4267
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"speedMbps": 4267
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}
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}
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},
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},
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{
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"name": "MT53E1G32D2NP-046 WT:B",
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"attribs": {
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"densityPerChannelGb": 8,
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"banks": 8,
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"channelsPerDie": 2,
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"diesPerPackage": 2,
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"bitWidthPerChannel": 16,
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"ranksPerChannel": 1,
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"speedMbps": 4267
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}
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},
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{
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{
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"name": "H9HKNNNCRMBVAR-NEH",
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"name": "H9HKNNNCRMBVAR-NEH",
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"attribs": {
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"attribs": {
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