util/spd_tools: Add MT53E1G32D2NP-046 WT:B LPDDR4 config
The revision B version of the MT53E1G32D2NP-046 memory chip will be used in the next guybrush build. It has a different internal layout than the Revision A part, with 2 ZQ lines per module instead of 1. BUG=b:186027256 TEST=Build only Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: I066f40eb890648a9be17cfe0cee20d299000c11a Reviewed-on: https://review.coreboot.org/c/coreboot/+/52586 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
This commit is contained in:
parent
598f2babdc
commit
7e241bff18
|
@ -60,6 +60,18 @@
|
|||
"speedMbps": 4267
|
||||
}
|
||||
},
|
||||
{
|
||||
"name": "MT53E1G32D2NP-046 WT:B",
|
||||
"attribs": {
|
||||
"densityPerChannelGb": 8,
|
||||
"banks": 8,
|
||||
"channelsPerDie": 2,
|
||||
"diesPerPackage": 2,
|
||||
"bitWidthPerChannel": 16,
|
||||
"ranksPerChannel": 1,
|
||||
"speedMbps": 4267
|
||||
}
|
||||
},
|
||||
{
|
||||
"name": "H9HKNNNCRMBVAR-NEH",
|
||||
"attribs": {
|
||||
|
|
Loading…
Reference in New Issue