northbridge/intel/e7505: transition away from device_t

Replace the use of the old device_t definition inside
northbridge/intel/e7505.

Change-Id: Ie819f380ec06667e11bcff3e9e993126a86b2c89
Signed-off-by: Antonello Dettori <dev@dettori.io>
Reviewed-on: https://review.coreboot.org/16469
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Antonello Dettori 2016-09-03 10:45:33 +02:00 committed by Martin Roth
parent e6a5f608e1
commit 7ea0fe5cbf
2 changed files with 4 additions and 4 deletions

View File

@ -21,7 +21,7 @@ void print_debug_pci_dev(unsigned dev)
void print_pci_devices(void)
{
device_t dev;
pci_devfn_t dev;
for (dev = PCI_DEV(0, 0, 0);
dev <= PCI_DEV(0xff, 0x1f, 0x7);
dev += PCI_DEV(0,0,1)) {
@ -54,7 +54,7 @@ void dump_pci_device(unsigned dev)
void dump_pci_devices(void)
{
device_t dev;
pci_devfn_t dev;
for (dev = PCI_DEV(0, 0, 0);
dev <= PCI_DEV(0xff, 0x1f, 0x7);
dev += PCI_DEV(0,0,1)) {
@ -71,7 +71,7 @@ void dump_pci_devices(void)
void dump_pci_devices_on_bus(unsigned busn)
{
device_t dev;
pci_devfn_t dev;
for (dev = PCI_DEV(busn, 0, 0);
dev <= PCI_DEV(busn, 0x1f, 0x7);
dev += PCI_DEV(0,0,1)) {

View File

@ -6,7 +6,7 @@
#define MAX_DIMM_SOCKETS (MAX_NUM_CHANNELS * MAX_DIMM_SOCKETS_PER_CHANNEL)
struct mem_controller {
device_t d0, d0f1; // PCI bus/device/fcns of E7501 memory controller
pci_devfn_t d0, d0f1; // PCI bus/device/fcns of E7501 memory controller
// SMBus addresses of DIMM slots for each channel,
// in order from closest to MCH to furthest away