northbridge/intel/e7505: transition away from device_t
Replace the use of the old device_t definition inside northbridge/intel/e7505. Change-Id: Ie819f380ec06667e11bcff3e9e993126a86b2c89 Signed-off-by: Antonello Dettori <dev@dettori.io> Reviewed-on: https://review.coreboot.org/16469 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
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@ -21,7 +21,7 @@ void print_debug_pci_dev(unsigned dev)
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void print_pci_devices(void)
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{
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device_t dev;
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pci_devfn_t dev;
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for (dev = PCI_DEV(0, 0, 0);
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dev <= PCI_DEV(0xff, 0x1f, 0x7);
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dev += PCI_DEV(0,0,1)) {
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@ -54,7 +54,7 @@ void dump_pci_device(unsigned dev)
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void dump_pci_devices(void)
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{
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device_t dev;
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pci_devfn_t dev;
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for (dev = PCI_DEV(0, 0, 0);
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dev <= PCI_DEV(0xff, 0x1f, 0x7);
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dev += PCI_DEV(0,0,1)) {
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@ -71,7 +71,7 @@ void dump_pci_devices(void)
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void dump_pci_devices_on_bus(unsigned busn)
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{
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device_t dev;
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pci_devfn_t dev;
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for (dev = PCI_DEV(busn, 0, 0);
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dev <= PCI_DEV(busn, 0x1f, 0x7);
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dev += PCI_DEV(0,0,1)) {
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@ -6,7 +6,7 @@
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#define MAX_DIMM_SOCKETS (MAX_NUM_CHANNELS * MAX_DIMM_SOCKETS_PER_CHANNEL)
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struct mem_controller {
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device_t d0, d0f1; // PCI bus/device/fcns of E7501 memory controller
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pci_devfn_t d0, d0f1; // PCI bus/device/fcns of E7501 memory controller
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// SMBus addresses of DIMM slots for each channel,
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// in order from closest to MCH to furthest away
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