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Spell *Boot Guard* with a space for official spelling 

See for example Intel document *Secure the Network Infrastructure –
Secure Boot Methodologies* [1].

Change all occurrences with the command below:

    $ git grep -l BootGuard | xargs sed -i 's/BootGuard/Boot Guard/g'

[1]: https://builders.intel.com/docs/networkbuilders/secure-the-network-infrastructure-secure-boot-methodologies.pdf

Change-Id: I69fb64b525fb4799bcb9d75624003c0d59b885b5
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60136
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Paul Menzel 2021-12-15 10:47:05 +01:00 committed by Felix Held
parent 74d2218cc7
commit 7f5a1eeb24
4 changed files with 8 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/lib/Kconfig.cbfs_verification
View File

@ -13,7 +13,7 @@ config CBFS_VERIFICATION
file as it gets loaded by chaining it to a trust anchor that is
embedded in the bootblock. This only makes sense if you use some
out-of-band mechanism to guarantee the integrity of the bootblock
itself, such as Intel BootGuard or flash write-protection.
itself, such as Intel Boot Guard or flash write-protection.
If a CBFS image was created with this option enabled, cbfstool will
automatically update the hash embedded in the bootblock whenever it

2
src/northbridge/intel/haswell/northbridge.c
View File

@ -247,7 +247,7 @@ static void mc_add_dram_resources(struct device *dev, int *resource_cnt)
/*
* DMA Protected Range can be reserved below TSEG for PCODE patch
* or TXT/BootGuard related data. Rather than report a base address,
* or TXT/Boot Guard related data. Rather than report a base address,
* the DPR register reports the TOP of the region, which is the same
* as TSEG base. The region size is reported in MiB in bits 11:4.
*/

2
src/soc/intel/broadwell/northbridge.c
View File

@ -272,7 +272,7 @@ static void mc_add_dram_resources(struct device *dev, int *resource_cnt)
/*
* DMA Protected Range can be reserved below TSEG for PCODE patch
* or TXT/BootGuard related data. Rather than report a base address
* or TXT/Boot Guard related data. Rather than report a base address
* the DPR register reports the TOP of the region, which is the same
* as TSEG base. The region size is reported in MiB in bits 11:4.
*/

10
util/intelmetool/intelmetool.c
View File

@ -346,7 +346,7 @@ static void dump_bootguard_info(void)
if (ME_major_ver &&
(ME_major_ver < 9 ||
(ME_major_ver == 9 && ME_minor_ver < 5))) {
printf(CGRN "Your system isn't BootGuard ready.\n"
printf(CGRN "Your system isn't Boot Guard ready.\n"
"You can flash other firmware!\n" RESET);
rehide_me();
return;
@ -354,7 +354,7 @@ static void dump_bootguard_info(void)
if (pci_read_long(dev, 0x40) & 0x10)
printf(CYEL "Your southbridge configuration is insecure!!\n"
"BootGuard keys can be overwritten or wiped, or you are "
"Boot Guard keys can be overwritten or wiped, or you are "
"in developer mode.\n"
RESET);
rehide_me();
@ -380,10 +380,10 @@ static void dump_bootguard_info(void)
return;
}
printf("BootGuard MSR Output : 0x%" PRIx64 "\n", btg.raw);
printf("Boot Guard MSR Output : 0x%" PRIx64 "\n", btg.raw);
if (!btg.btg_capability) {
printf(CGRN "Your system isn't BootGuard ready.\n"
printf(CGRN "Your system isn't Boot Guard ready.\n"
"You can flash other firmware!\n" RESET);
return;
}
@ -412,7 +412,7 @@ static void dump_bootguard_info(void)
"Cache-As-RAM.\nIt might be possible to flash other firmware.\n"
RESET);
} else {
printf(CGRN "Your system is BootGuard ready but verified boot is disabled.\n"
printf(CGRN "Your system is Boot Guard ready but verified boot is disabled.\n"
"You can flash other firmware!\n" RESET);
}
}