get solo building after last infrastructure changes

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1700 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/mainboard/amd/solo/auto.c

@@ -4,7 +4,8 @@
 #include <arch/io.h>
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
-#include <arch/smp/lapic.h>
+#include <cpu/x86/lapic.h>
+#include <arch/cpu.h>
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
@@ -13,13 +14,15 @@
 #include "northbridge/amd/amdk8/incoherent_ht.c"
 #include "southbridge/amd/amd8111/amd8111_early_smbus.c"
 #include "northbridge/amd/amdk8/raminit.h"
-#include "cpu/k8/apic_timer.c"
+#include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
-#include "cpu/p6/boot_cpu.c"
+#include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "northbridge/amd/amdk8/debug.c"
 #include "northbridge/amd/amdk8/cpu_rev.c"
 #include "superio/NSC/pc87360/pc87360_early_serial.c"
+#include "cpu/amd/mtrr/amd_earlymtrr.c"
+#include "cpu/x86/bist.h"
 
 #define SERIAL_DEV PNP_DEV(0x2e, PC87360_SP1)
 
@@ -90,7 +93,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 #include "sdram/generic_sdram.c"
 #include "northbridge/amd/amdk8/resourcemap.c"
 
-static void main(void)
+static void main(unsigned long bist)
 {
 	static const struct mem_controller cpu[] = {
 		{
@@ -105,23 +108,34 @@ static void main(void)
 	};
 
 	int needs_reset;
-	enable_lapic();
-	init_timer();
 
-	if (cpu_init_detected()) {
-		asm("jmp __cpu_reset");
-	}
-
-	distinguish_cpu_resets();
-	if (!boot_cpu()) {
-		print_err("This LinuxBIOS image is built for UP only.\n");
-		stop_this_cpu();
+	if (bist == 0) {
+		/* Skip this if there was a built in self test failure */
+		amd_early_mtrr_init();
+		
+		enable_lapic();
+		init_timer();
+		
+		if (cpu_init_detected()) {
+			asm volatile ("jmp __cpu_reset");
+		}
+
+		distinguish_cpu_resets();
+		
+		if (!boot_cpu()) {
+			/* This LinuxBIOS image is built for UP only */
+			stop_this_cpu();
+		}
 	}
 
+	/* Setup the console */
 	pc87360_enable_serial(SERIAL_DEV, TTYS0_BASE);
 	uart_init();
 	console_init();
 
+	/* Halt if there was a built in self test failure */
+	report_bist_failure(bist);
+	
 	setup_default_resource_map();
 	needs_reset = setup_coherent_ht_domain();
 	needs_reset |= ht_setup_chain(PCI_DEV(0, 0x18, 0), 0x80);
@@ -133,9 +147,7 @@ static void main(void)
 #if 0
 	print_pci_devices();
 #endif
-
 	enable_smbus();
-
 #if 0
 	dump_spd_registers(&cpu[0]);
 #endif
@@ -146,8 +158,8 @@ static void main(void)
 #if 0
 	dump_pci_devices();
 	dump_pci_device(PCI_DEV(0, 0x18, 2));
-#endif
 
 	/* Check the first 1M */
 	ram_check(0x00000000, 0x000100000);
+#endif
 }

src/mainboard/amd/solo/chip.h

@@ -1,4 +1,4 @@
-extern struct chip_operations mainboard_amd_solo_control;
+extern struct chip_operations mainboard_amd_solo_ops;
 
 struct mainboard_amd_solo_config {
 	int nothing;

src/mainboard/amd/solo/mainboard.c

@@ -9,7 +9,26 @@
 #include "../../../northbridge/amd/amdk8/northbridge.h"
 #include "chip.h"
 
+static void mainboard_init(device_t dev)
+{
+	root_dev_init(dev);
+}
 
-struct chip_operations mainboard_amd_solo_control = {
-	.name = "AMD Solo7 mainboard ",
+static struct device_operations mainboard_operations = {
+	.read_resources   = root_dev_read_resources,
+	.set_resources    = root_dev_set_resources,
+	.enable_resources = root_dev_enable_resources,
+	.init             = mainboard_init,
+	.scan_bus         = root_dev_scan_bus,
+	.enable = 0,
+};
+
+static void enable_dev(struct device *dev)
+{
+	dev->ops = &mainboard_operations;
+}
+
+struct chip_operations mainboard_amd_solo_ops = {
+	.name = "AMD Solo7 mainboard ",
+	.enable_dev = enable_dev,
 };

src/mainboard/amd/solo/mptable.c

@@ -4,7 +4,7 @@
 #include <string.h>
 #include <stdint.h>
 
-void *smp_write_config_table(void *v, unsigned long *processor_map)
+void *smp_write_config_table(void *v)
 {
 	static const char sig[4] = "PCMP";
 	static const char oem[8] = "AMD     ";
@@ -32,7 +32,7 @@ void *smp_write_config_table(void *v, unsigned long *processor_map)
 	mc->mpe_checksum = 0;
 	mc->reserved = 0;
 
-	smp_write_processors(mc, processor_map);
+	smp_write_processors(mc);
 
 	{
 		device_t dev;
@@ -233,10 +233,9 @@ void *smp_write_config_table(void *v, unsigned long *processor_map)
 	return smp_next_mpe_entry(mc);
 }
 
-unsigned long write_smp_table(unsigned long addr,
-			      unsigned long *processor_map)
+unsigned long write_smp_table(unsigned long addr)
 {
 	void *v;
 	v = smp_write_floating_table(addr);
-	return (unsigned long) smp_write_config_table(v, processor_map);
+	return (unsigned long) smp_write_config_table(v);
 }