device/dram/ddr2: Use 'enum cb_err' instead of 'int'

Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: I8ea6e773d858b30d75ff93d4fe07301f3825c1cb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68240
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Elyes Haouas 2022-10-08 15:50:32 +02:00 committed by Felix Held
parent 8917ab4346
commit 803241c03e
1 changed files with 3 additions and 3 deletions

View File

@ -122,7 +122,7 @@ u8 spd_get_msbs(u8 c)
* Decodes a raw SPD data from a DDR2 DIMM. * Decodes a raw SPD data from a DDR2 DIMM.
* Returns cycle time in 1/256th ns. * Returns cycle time in 1/256th ns.
*/ */
static int spd_decode_tck_time(u32 *tck, u8 c) static enum cb_err spd_decode_tck_time(u32 *tck, u8 c)
{ {
u8 high, low; u8 high, low;
@ -159,7 +159,7 @@ static int spd_decode_tck_time(u32 *tck, u8 c)
* Decodes a raw SPD data from a DDR2 DIMM. * Decodes a raw SPD data from a DDR2 DIMM.
* Returns cycle time in 1/256th ns. * Returns cycle time in 1/256th ns.
*/ */
static int spd_decode_bcd_time(u32 *bcd, u8 c) static enum cb_err spd_decode_bcd_time(u32 *bcd, u8 c)
{ {
u8 high, low; u8 high, low;
@ -194,7 +194,7 @@ static u32 spd_decode_quarter_time(u8 c)
* Decodes a raw SPD data from a DDR2 DIMM. * Decodes a raw SPD data from a DDR2 DIMM.
* Returns cycle time in 1/256th us. * Returns cycle time in 1/256th us.
*/ */
static int spd_decode_tRR_time(u32 *tRR, u8 c) static enum cb_err spd_decode_tRR_time(u32 *tRR, u8 c)
{ {
switch (c & ~0x80) { switch (c & ~0x80) {
default: default: