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comments mods. THings are working better, so I'm less unhappy with 

this part :-)


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2049 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Ronald G. Minnich 2005-09-26 16:48:24 +00:00
parent a4baa1673e
commit 803719a22d
1 changed files with 3 additions and 3 deletions
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6
src/cpu/amd/sc520/raminit.c
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@ -367,7 +367,7 @@ static void dumpram(void){
* causing romcc real headaches, so we're going to be be a little * causing romcc real headaches, so we're going to be be a little
* less silly. * less silly.
* so, the order of ops is: * so, the order of ops is:
* for in 3 to 0 * for i in 3 to 0
* see if bank is there. * see if bank is there.
* if we can write a word, and read it back, to hell with paranoia * if we can write a word, and read it back, to hell with paranoia
* the bank is there. So write the magic byte, read it back, and * the bank is there. So write the magic byte, read it back, and
@ -701,8 +701,8 @@ bad_ram:
#endif #endif
} }
/* note: based on AMD code, but AMD code is BROKEN AFAIK */ /* note: based on AMD code*/
/* this does now work worth shit. */ /* This code is known to work on the digital logic board. */
int int
staticmem(void){ staticmem(void){
volatile unsigned long *zero = (unsigned long *) CACHELINESZ; volatile unsigned long *zero = (unsigned long *) CACHELINESZ;