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mb/google/rex: Disable TBT PCIe rp1 and rp3 root ports 

Rex board only uses TBT PCIe root ports 0 and 2. This change disables
rp1 and rp3 root ports.

BUG=b:254207628
TEST=Booted to OS and verified rp1 and rp3 root ports were disabled.

Change-Id: Ia5c1d657c0ad0482619d739f8949bc9168eac25b
Signed-off-by: zhaojohn <john.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68854
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tarun Tuli <taruntuli@google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
This commit is contained in:
zhaojohn 2022-10-25 12:38:20 -07:00 committed by Subrata Banik
parent b5d402e388
commit 80a3b96593
1 changed files with 0 additions and 2 deletions
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2
src/mainboard/google/rex/variants/rex0/overridetree.cb
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@ -136,9 +136,7 @@ chip soc/intel/meteorlake
}"
end #PCIE11 SD card
device ref tbt_pcie_rp0 on end
device ref tbt_pcie_rp1 on end
device ref tbt_pcie_rp2 on end
device ref tbt_pcie_rp3 on end
device ref tcss_xhci on
chip drivers/usb/acpi
device ref tcss_root_hub on