soc/amd: Print dimm_info and TYPE17_DMI_INFO to help debug incorrect values
Example output: AGESA TYPE 17 DMI INFO: Handle: 1 TotalWidth: 64 DataWidth: 64 MemorySize: 8192 DeviceSet: 0 Speed: 1200 ManufacturerIdCode: 44416 Attributes: 1 ExtSize: 0 ConfigSpeed: 933 MemoryType: 0x1a FormFactor: 0xd DeviceLocator: DIMM 0 BankLocator: CHANNEL A SerialNumber(8): 00000000 PartNumber(20): HMAA51S6AMR6N-UH CBMEM_ID_MEMINFO: dimm_size: 0 ddr_type: 0x1a ddr_frequency: 1200 rank_per_dimm: 1 channel_num: 0 dimm_num: 0 bank_locator: 0 mod_id: 44416 mod_type: 0x1a bus_width: 64 serial(4): 0000 module_part_number(23): HMAA51S6AMR6N-UH ��@ dimm_size, mod_type, bus_width need to be updated so they return the correct values. module_part_number is missing a null terminator due to the AGESA part number being larger than the dimm_info buffer. Example dmidecode output: Memory Device Array Handle: 0x0000 Error Information Handle: Not Provided Total Width: 8 bits Data Width: 8 bits Size: No Module Installed Form Factor: Unknown Set: None Locator: Channel-0-DIMM-0 Bank Locator: BANK 0 Type: DDR4 Type Detail: Synchronous Speed: 1200 MT/s Manufacturer: Hynix/Hyundai Serial Number: 0000 Asset Tag: Not Specified Part Number: HMAA51S6AMR6N-UH Rank: 1 Configured Clock Speed: 1200 MT/s Minimum Voltage: Unknown Maximum Voltage: Unknown Configured Voltage: Unknown To enable the output set CONFIG_DEBUG_RAM_SETUP. The Kconfig change is required in order to enable CONFIG_DEBUG_RAM_SETUP, otherwise it's not a valid option. BUG=b:65403853 TEST=Test output shown above Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I5eac00b9400056357915761287770a400b3f9f8b Reviewed-on: https://review.coreboot.org/25303 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -1,5 +1,6 @@
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config SOC_AMD_COMMON_BLOCK_PI
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bool
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select HAVE_DEBUG_RAM_SETUP
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default n
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help
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This option builds functions that interface AMD's AGESA.
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@ -53,6 +53,80 @@ static void transfer_memory_info(TYPE17_DMI_INFO *dmi17, struct dimm_info *dimm)
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sizeof(dimm->module_part_number));
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}
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static void print_dimm_info(const struct dimm_info *dimm)
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{
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printk(RAM_SPEW,
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"CBMEM_ID_MEMINFO:\n"
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" dimm_size: %u\n"
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" ddr_type: 0x%hx\n"
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" ddr_frequency: %hu\n"
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" rank_per_dimm: %hhu\n"
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" channel_num: %hhu\n"
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" dimm_num: %hhu\n"
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" bank_locator: %hhu\n"
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" mod_id: %hu\n"
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" mod_type: 0x%hhx\n"
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" bus_width: %hhu\n"
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" serial(%zu): %s\n"
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" module_part_number(%zu): %s\n",
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dimm->dimm_size,
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dimm->ddr_type,
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dimm->ddr_frequency,
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dimm->rank_per_dimm,
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dimm->channel_num,
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dimm->dimm_num,
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dimm->bank_locator,
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dimm->mod_id,
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dimm->mod_type,
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dimm->bus_width,
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strlen((char *) dimm->serial),
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(char *) dimm->serial,
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strlen((char *) dimm->module_part_number),
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(char *) dimm->module_part_number
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);
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}
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static void print_dmi_info(const TYPE17_DMI_INFO *dmi17)
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{
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printk(RAM_SPEW,
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"AGESA TYPE 17 DMI INFO:\n"
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" Handle: %hu\n"
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" TotalWidth: %hu\n"
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" DataWidth: %hu\n"
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" MemorySize: %hu\n"
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" DeviceSet: %hhu\n"
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" Speed: %hu\n"
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" ManufacturerIdCode: %llu\n"
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" Attributes: %hhu\n"
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" ExtSize: %u\n"
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" ConfigSpeed: %hu\n"
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" MemoryType: 0x%x\n"
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" FormFactor: 0x%x\n"
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" DeviceLocator: %8s\n"
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" BankLocator: %10s\n"
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" SerialNumber(%zu): %9s\n"
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" PartNumber(%zu): %19s\n",
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dmi17->Handle,
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dmi17->TotalWidth,
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dmi17->DataWidth,
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dmi17->MemorySize,
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dmi17->DeviceSet,
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dmi17->Speed,
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dmi17->ManufacturerIdCode,
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dmi17->Attributes,
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dmi17->ExtSize,
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dmi17->ConfigSpeed,
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dmi17->MemoryType,
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dmi17->FormFactor,
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dmi17->DeviceLocator,
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dmi17->BankLocator,
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strlen((char *) dmi17->SerialNumber),
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dmi17->SerialNumber,
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strlen((char *) dmi17->PartNumber),
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dmi17->PartNumber
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);
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}
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static void prepare_dmi_17(void *unused)
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{
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DMI_INFO *DmiTable;
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@ -77,6 +151,8 @@ static void prepare_dmi_17(void *unused)
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dimm->channel_num = i;
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dimm->dimm_num = j;
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transfer_memory_info(address, dimm);
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print_dmi_info(address);
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print_dimm_info(dimm);
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dimm_cnt++;
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}
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}
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