mainboard/google/slippy: Fix usage of GNU field designator ext
Following the reasoning in,
8089f17
mainboard/lenovo/x230 Fix usage of GNU field designator extension
In C99 we defined a syntax for this. GCC's old syntax was deprecated.
Change-Id: I219ae74d60fd7211de2edee96e74bbe13130bb94
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5849
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
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@ -136,32 +136,32 @@ static void issd_power_sequence(void)
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void mainboard_romstage_entry(unsigned long bist)
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void mainboard_romstage_entry(unsigned long bist)
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{
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{
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struct pei_data pei_data = {
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struct pei_data pei_data = {
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pei_version: PEI_VERSION,
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.pei_version = PEI_VERSION,
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mchbar: DEFAULT_MCHBAR,
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.mchbar = DEFAULT_MCHBAR,
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dmibar: DEFAULT_DMIBAR,
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.dmibar = DEFAULT_DMIBAR,
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epbar: DEFAULT_EPBAR,
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.epbar = DEFAULT_EPBAR,
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pciexbar: DEFAULT_PCIEXBAR,
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.pciexbar = DEFAULT_PCIEXBAR,
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smbusbar: SMBUS_IO_BASE,
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.smbusbar = SMBUS_IO_BASE,
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wdbbar: 0x4000000,
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.wdbbar = 0x4000000,
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wdbsize: 0x1000,
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.wdbsize = 0x1000,
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hpet_address: HPET_ADDR,
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.hpet_address = HPET_ADDR,
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rcba: DEFAULT_RCBA,
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.rcba = DEFAULT_RCBA,
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pmbase: DEFAULT_PMBASE,
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.pmbase = DEFAULT_PMBASE,
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gpiobase: DEFAULT_GPIOBASE,
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.gpiobase = DEFAULT_GPIOBASE,
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temp_mmio_base: 0xfed08000,
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.temp_mmio_base = 0xfed08000,
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system_type: 5, /* ULT */
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.system_type = 5, /* ULT */
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tseg_size: CONFIG_SMM_TSEG_SIZE,
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.tseg_size = CONFIG_SMM_TSEG_SIZE,
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spd_addresses: { 0xff, 0x00, 0xff, 0x00 },
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.spd_addresses = { 0xff, 0x00, 0xff, 0x00 },
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ec_present: 1,
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.ec_present = 1,
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// 0 = leave channel enabled
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// 0 = leave channel enabled
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// 1 = disable dimm 0 on channel
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// 1 = disable dimm 0 on channel
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// 2 = disable dimm 1 on channel
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// 2 = disable dimm 1 on channel
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// 3 = disable dimm 0+1 on channel
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// 3 = disable dimm 0+1 on channel
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dimm_channel0_disabled: 2,
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.dimm_channel0_disabled = 2,
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dimm_channel1_disabled: 2,
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.dimm_channel1_disabled = 2,
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max_ddr3_freq: 1600,
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.max_ddr3_freq = 1600,
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usb_xhci_on_resume: 1,
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.usb_xhci_on_resume = 1,
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usb2_ports: {
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.usb2_ports = {
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/* Length, Enable, OCn#, Location */
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/* Length, Enable, OCn#, Location */
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{ 0x0150, 1, USB_OC_PIN_SKIP, /* P0: LTE */
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{ 0x0150, 1, USB_OC_PIN_SKIP, /* P0: LTE */
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USB_PORT_MINI_PCIE },
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USB_PORT_MINI_PCIE },
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@ -180,7 +180,7 @@ void mainboard_romstage_entry(unsigned long bist)
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{ 0x0000, 0, USB_OC_PIN_SKIP, /* P7: EMPTY */
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{ 0x0000, 0, USB_OC_PIN_SKIP, /* P7: EMPTY */
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USB_PORT_SKIP },
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USB_PORT_SKIP },
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},
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},
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usb3_ports: {
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.usb3_ports = {
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/* Enable, OCn# */
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/* Enable, OCn# */
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{ 1, 0 }, /* P1; Port A, CN10 */
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{ 1, 0 }, /* P1; Port A, CN10 */
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{ 1, 2 }, /* P2; Port B, CN6 */
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{ 1, 2 }, /* P2; Port B, CN6 */
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