Documentation/nb/intel/sandybridge/nri_registers.md: Fix mistake

According to a comment on fa1a07b, the 100MHz clock is the Ivy Bridge
only clock, not the 133MHz one.

Change-Id: I28fed4a9264b96f93b9e88325f547a5db512514c
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/28377
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons 2018-08-28 20:37:58 +02:00 committed by Martin Roth
parent 0805cbe6ae
commit 8120759d90
1 changed files with 2 additions and 2 deletions

View File

@ -2137,8 +2137,8 @@ Please handle with care !
+===========+==================================================================+
| 0:7| Selected multiplier: 100Mhz [7,12], 133Mhz [3,19] |
+-----------+------------------------------------------------------------------+
| 8 | - 1: 100Mhz reference clock |
| | - 0: 133Mhz reference clock (Ivy Bridge only) |
| 8 | - 1: 100Mhz reference clock (Ivy Bridge only) |
| | - 0: 133Mhz reference clock |
+-----------+------------------------------------------------------------------+
| 31 | PLL busy |
+-----------+------------------------------------------------------------------+