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arm: Put exception_stack into BSS 

"Hey guys, I have this awesome idea! How about we put a huge array
filled with 0xa5 into the data segment of our uncompressed romstage
for no particular reason? Give our SPI driver something to do so it
doesn't get too bored, you know?"

Guess it pays off to just hexdump our image and sanity-check it top to
bottom every once in a while...

Also reduces the size because 8K is crazy just to print a bunch of
registers (256 bytes ought to be enough for anybody).

Old-Change-Id: Icec0a711a1b5140d2ebcd98338ec638a4b6262fa
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/176762
Reviewed-by: Gabe Black <gabeblack@chromium.org>
Reviewed-by: Ronald Minnich <rminnich@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
(cherry picked from commit 61c360a1c3f445535c9ff383a389e643cfe4527c)

arm: Remove exception_test()

The exception_test() mechanism might have been useful when exceptions
were first implemented, but now that they are pretty stable it's really
not necessary anymore (especially not on every single boot in production
Chromebooks). It forces a simple unaligned access, and as we start
having exceptions in stages that might not have paging turned on yet,
it's better to remove that completely.

Also removed the duplicated implementations of SCTLR-stuff and switched
to the existing ones in cache.h.

Old-Change-Id: I85e66269f5e2f2dfd3e8aaaa18441493514b62f8
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/177101
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Gabe Black <gabeblack@chromium.org>
(cherry picked from commit d0706b848572fbea26e0e432ec5827503b9603c9)

Squashed 2 exception related commits.

Change-Id: Id2c115ee39a0732c375472afc0194436e2f5e069
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6885
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Julius Werner 2013-11-13 12:49:45 -08:00 committed by Isaac Christensen
parent edf6b57f73
commit 813f305e26
4 changed files with 27 additions and 106 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

45
payloads/libpayload/arch/arm/exception.c
View File

@ -27,13 +27,13 @@
* SUCH DAMAGE. * SUCH DAMAGE.
*/ */
#include <arch/cache.h>
#include <arch/exception.h> #include <arch/exception.h>
#include <libpayload.h> #include <libpayload.h>
#include <stdint.h> #include <stdint.h>
void exception_test(void); uint8_t exception_stack[0x100] __attribute__((aligned(8)));
extern void *exception_stack_end;
static int test_abort;
void exception_undefined_instruction(uint32_t *); void exception_undefined_instruction(uint32_t *);
void exception_software_interrupt(uint32_t *); void exception_software_interrupt(uint32_t *);
@ -103,14 +103,9 @@ void exception_prefetch_abort(uint32_t *regs)
void exception_data_abort(uint32_t *regs) void exception_data_abort(uint32_t *regs)
{ {
if (test_abort) {
regs[15] = regs[0];
return;
} else {
printf("exception _data_abort\n"); printf("exception _data_abort\n");
print_regs(regs); print_regs(regs);
dump_stack(regs[13], 512); dump_stack(regs[13], 512);
}
halt(); halt();
} }
@ -138,40 +133,16 @@ void exception_fiq(uint32_t *regs)
halt(); halt();
} }
static inline uint32_t get_sctlr(void)
{
uint32_t val;
asm("mrc p15, 0, %0, c1, c0, 0" : "=r" (val));
return val;
}
static inline void set_sctlr(uint32_t val)
{
asm volatile("mcr p15, 0, %0, c1, c0, 0" :: "r" (val));
asm volatile("" ::: "memory");
}
void exception_init(void) void exception_init(void)
{ {
static const uint32_t sctlr_te = (0x1 << 30); uint32_t sctlr = read_sctlr();
static const uint32_t sctlr_v = (0x1 << 13);
static const uint32_t sctlr_a = (0x1 << 1);
uint32_t sctlr = get_sctlr();
/* Handle exceptions in ARM mode. */ /* Handle exceptions in ARM mode. */
sctlr &= ~sctlr_te; sctlr &= ~SCTLR_TE;
/* Set V=0 in SCTLR so VBAR points to the exception vector table. */ /* Set V=0 in SCTLR so VBAR points to the exception vector table. */
sctlr &= ~sctlr_v; sctlr &= ~SCTLR_V;
/* Enforce alignment temporarily. */ write_sctlr(sctlr);
set_sctlr(sctlr | sctlr_a);
extern uint32_t exception_table[]; extern uint32_t exception_table[];
set_vbar((uintptr_t)exception_table); set_vbar((uintptr_t)exception_table);
exception_stack_end = exception_stack + sizeof(exception_stack);
test_abort = 1;
exception_test();
test_abort = 0;
/* Restore alignment settings. */
set_sctlr(sctlr);
} }

15
payloads/libpayload/arch/arm/exception_asm.S
View File

@ -27,11 +27,9 @@
* SUCH DAMAGE. * SUCH DAMAGE.
*/ */
exception_stack: .global exception_stack_end
.align 5
.skip 0x2000, 0xa5
exception_stack_end: exception_stack_end:
.word exception_stack_end .word 0
exception_handler: exception_handler:
.word 0 .word 0
@ -105,12 +103,3 @@ set_vbar:
mcr p15, 0, r0, c12, c0, 0 mcr p15, 0, r0, c12, c0, 0
bx lr bx lr
.global exception_test
.thumb_func
exception_test:
mov r1, $1
mov r0, pc
add r0, $3
ldr r1, [r1]
bx lr

46
src/arch/arm/armv7/exception.c
View File

@ -29,12 +29,12 @@
#include <stdint.h> #include <stdint.h>
#include <types.h> #include <types.h>
#include <arch/cache.h>
#include <arch/exception.h> #include <arch/exception.h>
#include <console/console.h> #include <console/console.h>
void exception_test(void); uint8_t exception_stack[0x100] __attribute__((aligned(8)));
extern void *exception_stack_end;
static int test_abort;
void exception_undefined_instruction(uint32_t *); void exception_undefined_instruction(uint32_t *);
void exception_software_interrupt(uint32_t *); void exception_software_interrupt(uint32_t *);
@ -104,14 +104,9 @@ void exception_prefetch_abort(uint32_t *regs)
void exception_data_abort(uint32_t *regs) void exception_data_abort(uint32_t *regs)
{ {
if (test_abort) {
regs[15] = regs[0];
return;
} else {
printk(BIOS_ERR, "exception _data_abort\n"); printk(BIOS_ERR, "exception _data_abort\n");
print_regs(regs); print_regs(regs);
dump_stack(regs[13], 512); dump_stack(regs[13], 512);
}
die("exception"); die("exception");
} }
@ -139,42 +134,19 @@ void exception_fiq(uint32_t *regs)
die("exception"); die("exception");
} }
static inline uint32_t get_sctlr(void)
{
uint32_t val;
asm("mrc p15, 0, %0, c1, c0, 0" : "=r" (val));
return val;
}
static inline void set_sctlr(uint32_t val)
{
asm volatile("mcr p15, 0, %0, c1, c0, 0" :: "r" (val));
asm volatile("" ::: "memory");
}
void exception_init(void) void exception_init(void)
{ {
static const uint32_t sctlr_te = (0x1 << 30); uint32_t sctlr = read_sctlr();
static const uint32_t sctlr_v = (0x1 << 13);
static const uint32_t sctlr_a = (0x1 << 1);
uint32_t sctlr = get_sctlr();
/* Handle exceptions in ARM mode. */ /* Handle exceptions in ARM mode. */
sctlr &= ~sctlr_te; sctlr &= ~SCTLR_TE;
/* Set V=0 in SCTLR so VBAR points to the exception vector table. */ /* Set V=0 in SCTLR so VBAR points to the exception vector table. */
sctlr &= ~sctlr_v; sctlr &= ~SCTLR_V;
/* Enforce alignment temporarily. */ /* Enforce alignment temporarily. */
set_sctlr(sctlr | sctlr_a); write_sctlr(sctlr);
extern uint32_t exception_table[]; extern uint32_t exception_table[];
set_vbar((uintptr_t)exception_table); set_vbar((uintptr_t)exception_table);
exception_stack_end = exception_stack + sizeof(exception_stack);
test_abort = 1; printk(BIOS_DEBUG, "Exception handlers installed.\n");
printk(BIOS_ERR, "Testing exceptions\n");
exception_test();
test_abort = 0;
printk(BIOS_ERR, "Testing exceptions: DONE\n");
/* Restore original alignment settings. */
set_sctlr(sctlr);
} }

15
src/arch/arm/armv7/exception_asm.S
View File

@ -27,11 +27,9 @@
* SUCH DAMAGE. * SUCH DAMAGE.
*/ */
exception_stack: .global exception_stack_end
.align 5
.skip 0x2000, 0xa5
exception_stack_end: exception_stack_end:
.word exception_stack_end .word 0
exception_handler: exception_handler:
.word 0 .word 0
@ -105,12 +103,3 @@ set_vbar:
mcr p15, 0, r0, c12, c0, 0 mcr p15, 0, r0, c12, c0, 0
bx lr bx lr
.global exception_test
.thumb_func
exception_test:
mov r1, $1
mov r0, pc
add r0, $3
ldr r1, [r1]
bx lr