nb/intel/i945: Drop dead code
This code is not even being build-tested. Drop it before it grows moss. Change-Id: I5e33526a02872c14e9fa37a485d2f93dea8b088f Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43230 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner
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@ -364,7 +364,7 @@ static void i945_setup_dmi_rcrb(void)
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printk(BIOS_DEBUG, "timeout!\n");
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else
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printk(BIOS_DEBUG, "done..\n");
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#if 1
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/* Enable Active State Power Management (ASPM) L0 state */
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reg32 = DMIBAR32(DMILCAP);
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@ -387,7 +387,6 @@ static void i945_setup_dmi_rcrb(void)
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if (activate_aspm)
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DMIBAR32(DMILCTL) |= (3 << 0);
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#endif
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/* Last but not least, some additional steps */
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reg32 = MCHBAR32(FSBSNPCTL);
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@ -771,10 +770,6 @@ static void ich7_setup_pci_express(void)
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/* Initialize slot power limit for root ports */
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pci_write_config32(PCI_DEV(0, 0x1c, 0), 0x54, 0x00000060);
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#if 0
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pci_write_config32(PCI_DEV(0, 0x1c, 4), 0x54, 0x00480ce0);
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pci_write_config32(PCI_DEV(0, 0x1c, 5), 0x54, 0x00500ce0);
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#endif
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pci_write_config32(PCI_DEV(0, 0x1c, 0), 0xd8, 0x00110000);
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}
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@ -194,19 +194,6 @@ static int sdram_capabilities_enhanced_addressing_xor(void)
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return (!reg8);
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}
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/* TODO check if we ever need this function */
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#if 0
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static int sdram_capabilities_MEM4G_disable(void)
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{
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u8 reg8;
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reg8 = pci_read_config8(PCI_DEV(0, 0x00, 0), 0xe5); /* CAPID0 + 5 */
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reg8 &= (1 << 0);
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return (reg8 != 0);
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}
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#endif
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#define GFX_FREQUENCY_CAP_166MHZ 0x04
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#define GFX_FREQUENCY_CAP_200MHZ 0x03
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#define GFX_FREQUENCY_CAP_250MHZ 0x02
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@ -2198,11 +2185,7 @@ static void sdram_power_management(struct sys_info *sysinfo)
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reg16 |= (4 << 11);
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MCHBAR16(CPCTL) = reg16;
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#if 0
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if ((MCHBAR32(ECO) & (1 << 16)) != 0) {
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#else
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if (i945_silicon_revision() != 0) {
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#endif
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switch (sysinfo->fsb_frequency) {
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case 667:
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MCHBAR32(HGIPMC2) = 0x0d590d59;
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@ -2253,13 +2236,6 @@ static void sdram_power_management(struct sys_info *sysinfo)
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else
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MCHBAR32(ECO) |= (1 << 16);
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#if 0
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if (i945_silicon_revision() == 0)
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MCHBAR32(FSBPMC3) &= ~(1 << 29);
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else
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MCHBAR32(FSBPMC3) |= (1 << 29);
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#endif
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MCHBAR32(FSBPMC3) &= ~(1 << 29);
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MCHBAR32(FSBPMC3) |= (1 << 21);
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@ -2288,19 +2264,6 @@ static void sdram_power_management(struct sys_info *sysinfo)
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pci_or_config8(PCI_DEV(0, 0x2, 0), 0xc1, 1 << 2);
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#ifdef C2_SELF_REFRESH_DISABLE
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if (integrated_graphics) {
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printk(BIOS_DEBUG, "C2 self-refresh with IGD\n");
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MCHBAR16(MIPMC4) = 0x0468;
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MCHBAR16(MIPMC5) = 0x046c;
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MCHBAR16(MIPMC6) = 0x046c;
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} else {
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MCHBAR16(MIPMC4) = 0x6468;
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MCHBAR16(MIPMC5) = 0x646c;
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MCHBAR16(MIPMC6) = 0x646c;
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}
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#else
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if (integrated_graphics) {
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MCHBAR16(MIPMC4) = 0x04f8;
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MCHBAR16(MIPMC5) = 0x04fc;
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@ -2311,8 +2274,6 @@ static void sdram_power_management(struct sys_info *sysinfo)
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MCHBAR16(MIPMC6) = 0x64fc;
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}
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#endif
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reg32 = MCHBAR32(PMCFG);
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reg32 &= ~(3 << 17);
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reg32 |= (2 << 17);
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