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soc/amd/picasso,stoneyridge/mca: use unsigned int for MCA bank number 

Change-Id: Ib31075fd615eaa8492ce0179b3b21317554f1c80
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56238
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Held 2021-07-12 21:53:23 +02:00
parent 5183abd312
commit 82af7491c2
2 changed files with 16 additions and 16 deletions
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16
src/soc/amd/picasso/mca.c
View File

@ -14,7 +14,7 @@
#define MCAX_USED_REGISTERS_PER_BANK (MCAX_MISC4_OFFSET + 1)
struct mca_bank_status {
int bank;
unsigned int bank;
msr_t sts;
};
@ -148,7 +148,7 @@ static const char *const mca_bank_name[] = {
/* Check the Machine Check Architecture Extension registers */
void check_mca(void)
{
int i;
unsigned int i;
struct mca_bank_status mci;
msr_t msr;
const unsigned int num_banks = mca_get_bank_count();
@ -156,23 +156,23 @@ void check_mca(void)
for (i = 0 ; i < num_banks ; i++) {
mci.sts = rdmsr(MCAX_STATUS_MSR(i));
if (mci.sts.hi || mci.sts.lo) {
printk(BIOS_WARNING, "#MC Error: core %u, bank %d %s\n",
printk(BIOS_WARNING, "#MC Error: core %u, bank %u %s\n",
initial_lapicid(), i,
i < ARRAY_SIZE(mca_bank_name) ? mca_bank_name[i] : "");
printk(BIOS_WARNING, " MC%d_STATUS = %08x_%08x\n",
printk(BIOS_WARNING, " MC%u_STATUS = %08x_%08x\n",
i, mci.sts.hi, mci.sts.lo);
msr = rdmsr(MCAX_ADDR_MSR(i));
printk(BIOS_WARNING, " MC%d_ADDR = %08x_%08x\n",
printk(BIOS_WARNING, " MC%u_ADDR = %08x_%08x\n",
i, msr.hi, msr.lo);
msr = rdmsr(MCAX_MISC0_MSR(i));
printk(BIOS_WARNING, " MC%d_MISC = %08x_%08x\n",
printk(BIOS_WARNING, " MC%u_MISC = %08x_%08x\n",
i, msr.hi, msr.lo);
msr = rdmsr(MCAX_CTL_MSR(i));
printk(BIOS_WARNING, " MC%d_CTL = %08x_%08x\n",
printk(BIOS_WARNING, " MC%u_CTL = %08x_%08x\n",
i, msr.hi, msr.lo);
msr = rdmsr(MCA_CTL_MASK_MSR(i));
printk(BIOS_WARNING, " MC%d_CTL_MASK = %08x_%08x\n",
printk(BIOS_WARNING, " MC%u_CTL_MASK = %08x_%08x\n",
i, msr.hi, msr.lo);
mci.bank = i;

16
src/soc/amd/stoneyridge/mca.c
View File

@ -10,7 +10,7 @@
#include <cper.h>
struct mca_bank_status {
int bank;
unsigned int bank;
msr_t sts;
};
@ -147,7 +147,7 @@ static const char *const mca_bank_name[] = {
void check_mca(void)
{
int i;
unsigned int i;
struct mca_bank_status mci;
msr_t msr;
const unsigned int num_banks = mca_get_bank_count();
@ -159,22 +159,22 @@ void check_mca(void)
mci.sts = rdmsr(IA32_MC0_STATUS + (i * 4));
if (mci.sts.hi || mci.sts.lo) {
printk(BIOS_WARNING, "#MC Error: core %u, bank %d %s\n",
printk(BIOS_WARNING, "#MC Error: core %u, bank %u %s\n",
initial_lapicid(), i, mca_bank_name[i]);
printk(BIOS_WARNING, " MC%d_STATUS = %08x_%08x\n",
printk(BIOS_WARNING, " MC%u_STATUS = %08x_%08x\n",
i, mci.sts.hi, mci.sts.lo);
msr = rdmsr(IA32_MC0_ADDR + (i * 4));
printk(BIOS_WARNING, " MC%d_ADDR = %08x_%08x\n",
printk(BIOS_WARNING, " MC%u_ADDR = %08x_%08x\n",
i, msr.hi, msr.lo);
msr = rdmsr(IA32_MC0_MISC + (i * 4));
printk(BIOS_WARNING, " MC%d_MISC = %08x_%08x\n",
printk(BIOS_WARNING, " MC%u_MISC = %08x_%08x\n",
i, msr.hi, msr.lo);
msr = rdmsr(IA32_MC0_CTL + (i * 4));
printk(BIOS_WARNING, " MC%d_CTL = %08x_%08x\n",
printk(BIOS_WARNING, " MC%u_CTL = %08x_%08x\n",
i, msr.hi, msr.lo);
msr = rdmsr(MC0_CTL_MASK + i);
printk(BIOS_WARNING, " MC%d_CTL_MASK = %08x_%08x\n",
printk(BIOS_WARNING, " MC%u_CTL_MASK = %08x_%08x\n",
i, msr.hi, msr.lo);
mci.bank = i;