memlayout: Store region sizes as separate symbols
This patch changes the memlayout macro infrastructure so that the size of a region "xxx" (i.e. the distance between the symbols _xxx and _exxx) is stored in a separate _xxx_size symbol. This has the advantage that region sizes can be used inside static initializers, and also saves an extra subtraction at runtime. Since linker symbols can only be treated as addresses (not as raw integers) by C, retain the REGION_SIZE() accessor macro to hide the necessary typecast. Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: Ifd89708ca9bd3937d0db7308959231106a6aa373 Reviewed-on: https://review.coreboot.org/c/coreboot/+/49332 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
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82d16b150c
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@ -8,6 +8,7 @@
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.section .bss, "aw", @nobits
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.global _stack
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.global _estack
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.global _stack_size
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/* Stack alignment is not enforced with rmodule loader, reserve one
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* extra CPU such that alignment can be enforced on entry. */
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@ -15,6 +16,7 @@
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_stack:
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.space (CONFIG_MAX_CPUS+1)*CONFIG_STACK_SIZE
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_estack:
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.set _stack_size, _estack - _stack
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#if CONFIG(COOP_MULTITASKING)
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.global thread_stacks
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thread_stacks:
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@ -11,9 +11,7 @@
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#if CONFIG(PAGING_IN_CACHE_AS_RAM)
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/* Page table pre-allocation. CONFIG_DCACHE_RAM_BASE should be 4KiB
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* aligned when using this option. */
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_pagetables = . ;
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. += 4096 * CONFIG_NUM_CAR_PAGE_TABLE_PAGES;
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_epagetables = . ;
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REGION(pagetables, ., 4K * CONFIG_NUM_CAR_PAGE_TABLE_PAGES, 4K)
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#endif
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#if CONFIG(VBOOT_STARTS_IN_BOOTBLOCK)
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/* Vboot work buffer only needs to be available when verified boot
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@ -28,9 +26,7 @@
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/* Stack for CAR stages. Since it persists across all stages that
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* use CAR it can be reused. The chipset/SoC is expected to provide
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* the stack size. */
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_car_stack = .;
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. += CONFIG_DCACHE_BSP_STACK_SIZE;
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_ecar_stack = .;
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REGION(car_stack, ., CONFIG_DCACHE_BSP_STACK_SIZE, 4)
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/* The pre-ram cbmem console as well as the timestamp region are fixed
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* in size. Therefore place them above the car global section so that
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* multiple stages (romstage and verstage) have a consistent
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@ -42,9 +38,7 @@
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* totalling 32 bytes that need to be 32-byte aligned. The reason the
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* pdpt are not colocated with the rest of the page tables is to reduce
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* fragmentation of the CAR space that persists across stages. */
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_pdpt = .;
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. += 32;
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_epdpt = .;
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REGION(pdpt, ., 32, 32)
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#endif
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TIMESTAMP(., 0x200)
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@ -56,10 +50,8 @@
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FMAP_CACHE(., FMAP_SIZE)
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#endif
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_car_ehci_dbg_info = .;
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/* Reserve sizeof(struct ehci_dbg_info). */
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. += 80;
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_ecar_ehci_dbg_info = .;
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REGION(car_ehci_dbg_info, ., 80, 1)
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/* _bss and _ebss provide symbols to per-stage
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* variables that are not shared like the timestamp and the pre-ram
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@ -75,6 +67,7 @@
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*(.sbss.*)
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. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
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_ebss = .;
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RECORD_SIZE(bss)
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#if ENV_ROMSTAGE && CONFIG(ASAN_IN_ROMSTAGE)
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_shadow_size = (_ebss - _car_region_start) >> 3;
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@ -33,22 +33,33 @@
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SET_COUNTER(name, addr) \
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_##name = ABSOLUTE(.);
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#define RECORD_SIZE(name) \
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_##name##_size = ABSOLUTE(_e##name - _##name);
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#define REGION(name, addr, size, expected_align) \
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SYMBOL(name, addr) \
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_ = ASSERT(. == ALIGN(expected_align), \
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STR(name must be aligned to expected_align!)); \
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SYMBOL(e##name, addr + size)
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SYMBOL(e##name, addr + size) \
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RECORD_SIZE(name)
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#define ALIAS_REGION(name, alias) \
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_##alias = ABSOLUTE(_##name); \
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_e##alias = ABSOLUTE(_e##name); \
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RECORD_SIZE(alias)
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#define REGION_START(name, addr) SYMBOL(name, addr)
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#define REGION_END(name, addr) \
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SYMBOL(e##name, addr) \
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RECORD_SIZE(name)
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/* Declare according to SRAM/DRAM ranges in SoC hardware-defined address map. */
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#define SRAM_START(addr) SYMBOL(sram, addr)
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#define SRAM_START(addr) REGION_START(sram, addr)
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#define SRAM_END(addr) SYMBOL(esram, addr)
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#define SRAM_END(addr) REGION_END(sram, addr)
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#define DRAM_START(addr) SYMBOL(dram, addr)
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#define DRAM_START(addr) REGION_START(dram, addr)
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#define TIMESTAMP(addr, size) \
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REGION(timestamp, addr, size, 8) \
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#define DECOMPRESSOR(addr, sz) \
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SYMBOL(decompressor, addr) \
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_edecompressor = ABSOLUTE(_decompressor + sz); \
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RECORD_SIZE(decompressor) \
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_ = ASSERT(_eprogram - _program <= sz, \
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STR(decompressor exceeded its allotted size! (sz))); \
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INCLUDE "decompressor/lib/program.ld"
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#define BOOTBLOCK(addr, sz) \
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SYMBOL(bootblock, addr) \
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_ebootblock = ABSOLUTE(_bootblock + sz); \
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RECORD_SIZE(bootblock) \
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_ = ASSERT(_eprogram - _program <= sz, \
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STR(Bootblock exceeded its allotted size! (sz))); \
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INCLUDE "bootblock/lib/program.ld"
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#define ROMSTAGE(addr, sz) \
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SYMBOL(romstage, addr) \
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_eromstage = ABSOLUTE(_romstage + sz); \
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RECORD_SIZE(romstage) \
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_ = ASSERT(_eprogram - _program <= sz, \
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STR(Romstage exceeded its allotted size! (sz))); \
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INCLUDE "romstage/lib/program.ld"
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#define RAMSTAGE(addr, sz) \
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SYMBOL(ramstage, addr) \
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_eramstage = ABSOLUTE(_ramstage + sz); \
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RECORD_SIZE(ramstage) \
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_ = ASSERT(_eprogram - _program <= sz, \
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STR(Ramstage exceeded its allotted size! (sz))); \
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INCLUDE "ramstage/lib/program.ld"
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#define VERSTAGE(addr, sz) \
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SYMBOL(verstage, addr) \
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_everstage = ABSOLUTE(_verstage + sz); \
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RECORD_SIZE(verstage) \
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_ = ASSERT(_eprogram - _program <= sz, \
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STR(Verstage exceeded its allotted size! (sz))); \
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INCLUDE "verstage/lib/program.ld"
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#define POSTCAR(addr, sz) \
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SYMBOL(postcar, addr) \
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_epostcar = ABSOLUTE(_postcar + sz); \
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RECORD_SIZE(postcar) \
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_ = ASSERT(_eprogram - _program <= sz, \
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STR(Aftercar exceeded its allotted size! (sz))); \
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INCLUDE "postcar/lib/program.ld"
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@ -7,11 +7,12 @@
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extern u8 _dram[];
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#define REGION_SIZE(name) (_e##name - _##name)
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#define REGION_SIZE(name) ((size_t)_##name##_size)
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#define DECLARE_REGION(name) \
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extern u8 _##name[]; \
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extern u8 _e##name[];
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extern u8 _e##name[]; \
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extern u8 _##name##_size[];
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/*
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* Regions can be declared optional if not all configurations provide them in
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*/
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#define DECLARE_OPTIONAL_REGION(name) \
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__weak extern u8 _##name[]; \
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__weak extern u8 _e##name[];
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__weak extern u8 _e##name[]; \
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__weak extern u8 _##name##_size[];
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DECLARE_REGION(sram)
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DECLARE_OPTIONAL_REGION(timestamp)
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_cbmem_init_hooks = .;
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KEEP(*(.rodata.cbmem_init_hooks));
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_ecbmem_init_hooks = .;
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RECORD_SIZE(cbmem_init_hooks)
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#endif
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. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
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_rsbe_init_begin = .;
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KEEP(*(.rsbe_init));
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_ersbe_init_begin = .;
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RECORD_SIZE(rsbe_init_begin)
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#if ENV_RAMSTAGE
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. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
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_pci_drivers = .;
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KEEP(*(.rodata.pci_driver));
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_epci_drivers = .;
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RECORD_SIZE(pci_drivers)
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. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
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_cpu_drivers = .;
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KEEP(*(.rodata.cpu_driver));
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_ecpu_drivers = .;
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RECORD_SIZE(cpu_drivers)
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#endif
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. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
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*(.rodata.*);
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. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
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_etext = .;
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RECORD_SIZE(text)
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} : to_load
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#if ENV_RAMSTAGE && (CONFIG(COVERAGE) || CONFIG(ASAN_IN_RAMSTAGE))
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_rmodule_params = .;
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KEEP(*(.module_parameters));
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_ermodule_params = .;
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RECORD_SIZE(rmodule_params)
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#endif
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*(.data);
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#if ENV_ROMSTAGE_OR_BEFORE
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PROVIDE(_preram_cbmem_console = .);
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PROVIDE(_epreram_cbmem_console = _preram_cbmem_console);
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PROVIDE(_preram_cbmem_console_size = ABSOLUTE(0));
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#elif ENV_RAMSTAGE
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. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
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_bs_init_begin = .;
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LONG(0);
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LONG(0);
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_ebs_init_begin = .;
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RECORD_SIZE(bs_init_begin)
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#endif
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. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
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_edata = .;
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RECORD_SIZE(data)
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}
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#endif
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*(.sbss.*)
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. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
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_ebss = .;
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RECORD_SIZE(bss)
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}
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#endif
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. += (ENV_RMODULE ? __heap_size : CONFIG_HEAP_SIZE);
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. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
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_eheap = .;
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RECORD_SIZE(heap)
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}
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#endif
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#endif
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_eprogram = .;
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RECORD_SIZE(program)
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/* Discard the sections we don't need/want */
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#include <bootblock_common.h>
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#include <symbols.h>
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extern u8 _secram[], _esecram[];
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void bootblock_mainboard_init(void)
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{
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mmu_init();
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mmu_config_range(_romstage, REGION_SIZE(romstage), MA_MEM | MA_S | MA_RW);
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mmu_config_range(_ramstage, REGION_SIZE(ramstage), MA_MEM | MA_S | MA_RW);
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mmu_config_range(_secram, REGION_SIZE(secram), MA_MEM | MA_S | MA_RW);
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mmu_config_range(_bl31, REGION_SIZE(bl31), MA_MEM | MA_S | MA_RW);
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mmu_enable();
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}
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#include <device/device.h>
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#include <bootmem.h>
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extern u8 _secram[], _esecram[];
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void bootmem_platform_add_ranges(void)
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{
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bootmem_add_range((uintptr_t)_secram, REGION_SIZE(secram), BM_MEM_BL31);
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bootmem_add_range((uintptr_t)_bl31, REGION_SIZE(bl31), BM_MEM_BL31);
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}
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static void mainboard_enable(struct device *dev)
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@ -16,7 +16,7 @@ SECTIONS
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{
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REGION(flash, 0x00000000, CONFIG_ROM_SIZE, 8)
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REGION(secram, 0xe000000, 0x1000000, 4096)
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BL31(0xe000000, 0x1000000)
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DRAM_START(0x40000000)
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BOOTBLOCK(0x60010000, 64K)
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STACK(0x60020000, 54K)
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@ -4,11 +4,11 @@
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#include <arch/header.ld>
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#include <soc/psp_transfer.h>
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#define EARLY_RESERVED_DRAM_START(addr) SYMBOL(early_reserved_dram, addr)
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#define EARLY_RESERVED_DRAM_END(addr) SYMBOL(eearly_reserved_dram, addr)
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#define EARLY_RESERVED_DRAM_START(addr) REGION_START(early_reserved_dram, addr)
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#define EARLY_RESERVED_DRAM_END(addr) REGION_END(early_reserved_dram, addr)
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#define PSP_SHAREDMEM_DRAM_START(addr) SYMBOL(psp_sharedmem_dram, addr)
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#define PSP_SHAREDMEM_DRAM_END(addr) SYMBOL(epsp_sharedmem_dram, addr)
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#define PSP_SHAREDMEM_DRAM_START(addr) REGION_START(psp_sharedmem_dram, addr)
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#define PSP_SHAREDMEM_DRAM_END(addr) REGION_END(psp_sharedmem_dram, addr)
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BOOTBLOCK_END = CONFIG_ROMSTAGE_ADDR;
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BOOTBLOCK_ADDR = BOOTBLOCK_END - CONFIG_C_ENV_BOOTBLOCK_SIZE;
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* It will be returned before starting the ramstage.
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* SRAM_L2C and SRAM can be cached, but only SRAM is DMA-able.
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*/
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#define SRAM_L2C_START(addr) SYMBOL(sram_l2c, addr)
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#define SRAM_L2C_END(addr) SYMBOL(esram_l2c, addr)
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#define SRAM_L2C_START(addr) REGION_START(sram_l2c, addr)
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#define SRAM_L2C_END(addr) REGION_END(sram_l2c, addr)
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#define DRAM_DMA(addr, size) \
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REGION(dram_dma, addr, size, 4K) \
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* It will be returned before starting the ramstage.
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* SRAM_L2C and SRAM can be cached, but only SRAM is DMA-able.
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*/
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#define SRAM_L2C_START(addr) SYMBOL(sram_l2c, addr)
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#define SRAM_L2C_END(addr) SYMBOL(esram_l2c, addr)
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#define SRAM_L2C_START(addr) REGION_START(sram_l2c, addr)
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#define SRAM_L2C_END(addr) REGION_END(sram_l2c, addr)
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#define DRAM_INIT_CODE(addr, size) \
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REGION(dram_init_code, addr, size, 4)
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* It will be returned before starting the ramstage.
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* SRAM_L2C and SRAM can be cached, but only SRAM is DMA-able.
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*/
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#define SRAM_L2C_START(addr) SYMBOL(sram_l2c, addr)
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#define SRAM_L2C_END(addr) SYMBOL(esram_l2c, addr)
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#define SRAM_L2C_START(addr) REGION_START(sram_l2c, addr)
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#define SRAM_L2C_END(addr) REGION_END(sram_l2c, addr)
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#define DRAM_INIT_CODE(addr, size) \
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REGION(dram_init_code, addr, size, 64K)
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@ -4,9 +4,6 @@
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#include <arch/header.ld>
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#define REGION_START(name, addr) SYMBOL(name, addr)
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#define REGION_END(name, addr) SYMBOL(e##name, addr)
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SECTIONS
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{
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REGION(oc_imem, 0x08600000, 32K, 0)
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@ -4,12 +4,12 @@
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#include <arch/header.ld>
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/* SYSTEM_IMEM : 0x8600000 - 0x8607FFF */
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#define SSRAM_START(addr) SYMBOL(ssram, addr)
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#define SSRAM_END(addr) SYMBOL(essram, addr)
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#define SSRAM_START(addr) REGION_START(ssram, addr)
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#define SSRAM_END(addr) REGION_END(ssram, addr)
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/* BOOT_IMEM : 0x8C00000 - 0x8D80000 */
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#define BSRAM_START(addr) SYMBOL(bsram, addr)
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#define BSRAM_END(addr) SYMBOL(ebsram, addr)
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#define BSRAM_START(addr) REGION_START(bsram, addr)
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#define BSRAM_END(addr) REGION_END(bsram, addr)
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SECTIONS
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{
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@ -4,16 +4,16 @@
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#include <arch/header.ld>
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/* SYSTEM_IMEM : 0x14680000 - 0x146AE000 */
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#define SSRAM_START(addr) SYMBOL(ssram, addr)
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#define SSRAM_END(addr) SYMBOL(essram, addr)
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#define SSRAM_START(addr) REGION_START(ssram, addr)
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#define SSRAM_END(addr) REGION_END(ssram, addr)
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/* BOOT_IMEM : 0x14800000 - 0x14980000 */
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#define BSRAM_START(addr) SYMBOL(bsram, addr)
|
||||
#define BSRAM_END(addr) SYMBOL(ebsram, addr)
|
||||
#define BSRAM_START(addr) REGION_START(bsram, addr)
|
||||
#define BSRAM_END(addr) REGION_END(bsram, addr)
|
||||
|
||||
/* AOP : 0x0B000000 - 0x0B100000 */
|
||||
#define AOPSRAM_START(addr) SYMBOL(aopsram, addr)
|
||||
#define AOPSRAM_END(addr) SYMBOL(eaopsram, addr)
|
||||
#define AOPSRAM_START(addr) REGION_START(aopsram, addr)
|
||||
#define AOPSRAM_END(addr) REGION_END(aopsram, addr)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
|
|
|
@ -28,8 +28,8 @@ SECTIONS
|
|||
|
||||
/* 4K of special SRAM in PMU power domain.
|
||||
* Careful: only supports 32-bit wide write accesses! */
|
||||
SYMBOL(pmu_sram, 0xFF720000)
|
||||
REGION_START(pmu_sram, 0xFF720000)
|
||||
TTB_SUBTABLES(0xFF720800, 1K)
|
||||
WATCHDOG_TOMBSTONE(0xFF720FFC, 4)
|
||||
SYMBOL(epmu_sram, 0xFF721000)
|
||||
REGION_END(pmu_sram, 0xFF721000)
|
||||
}
|
||||
|
|
|
@ -12,9 +12,9 @@ SECTIONS
|
|||
DMA_COHERENT(0x10000000, 2M)
|
||||
|
||||
/* 8K of special SRAM in PMU power domain. */
|
||||
SYMBOL(pmu_sram, 0xFF3B0000)
|
||||
REGION_START(pmu_sram, 0xFF3B0000)
|
||||
WATCHDOG_TOMBSTONE(0xFF3B1FFC, 4)
|
||||
SYMBOL(epmu_sram, 0xFF3B2000)
|
||||
REGION_END(pmu_sram, 0xFF3B2000)
|
||||
|
||||
SRAM_START(0xFF8C0000)
|
||||
#if ENV_RAMSTAGE
|
||||
|
|
|
@ -5,8 +5,8 @@
|
|||
|
||||
#include <arch/header.ld>
|
||||
|
||||
#define L2LIM_START(addr) SYMBOL(l2lim, addr)
|
||||
#define L2LIM_END(addr) SYMBOL(el2lim, addr)
|
||||
#define L2LIM_START(addr) REGION_START(l2lim, addr)
|
||||
#define L2LIM_END(addr) REGION_END(l2lim, addr)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
|
|
|
@ -26,6 +26,7 @@
|
|||
* Create end symbol for it.
|
||||
*/
|
||||
#define TEST_REGION(region, size) uint8_t _##region[size]; \
|
||||
TEST_SYMBOL(_e##region, _##region + size)
|
||||
TEST_SYMBOL(_e##region, _##region + size); \
|
||||
TEST_SYMBOL(_##region##_size, size)
|
||||
|
||||
#endif /* _TESTS_TEST_H */
|
||||
|
|
Loading…
Reference in New Issue