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memlayout: Store region sizes as separate symbols 

This patch changes the memlayout macro infrastructure so that the size
of a region "xxx" (i.e. the distance between the symbols _xxx and _exxx)
is stored in a separate _xxx_size symbol. This has the advantage that
region sizes can be used inside static initializers, and also saves an
extra subtraction at runtime. Since linker symbols can only be treated
as addresses (not as raw integers) by C, retain the REGION_SIZE()
accessor macro to hide the necessary typecast.

Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: Ifd89708ca9bd3937d0db7308959231106a6aa373
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49332
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Julius Werner 2020-12-30 15:51:10 -08:00 committed by Patrick Georgi
parent 422501fb14
commit 82d16b150c
19 changed files with 76 additions and 56 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/arch/x86/c_start.S
View File

@ -8,6 +8,7 @@
.section .bss, "aw", @nobits .section .bss, "aw", @nobits
.global _stack .global _stack
.global _estack .global _estack
.global _stack_size
/* Stack alignment is not enforced with rmodule loader, reserve one /* Stack alignment is not enforced with rmodule loader, reserve one
* extra CPU such that alignment can be enforced on entry. */ * extra CPU such that alignment can be enforced on entry. */
@ -15,6 +16,7 @@
_stack: _stack:
.space (CONFIG_MAX_CPUS+1)*CONFIG_STACK_SIZE .space (CONFIG_MAX_CPUS+1)*CONFIG_STACK_SIZE
_estack: _estack:
.set _stack_size, _estack - _stack
#if CONFIG(COOP_MULTITASKING) #if CONFIG(COOP_MULTITASKING)
.global thread_stacks .global thread_stacks
thread_stacks: thread_stacks:

17
src/arch/x86/car.ld
View File

@ -11,9 +11,7 @@
#if CONFIG(PAGING_IN_CACHE_AS_RAM) #if CONFIG(PAGING_IN_CACHE_AS_RAM)
/* Page table pre-allocation. CONFIG_DCACHE_RAM_BASE should be 4KiB /* Page table pre-allocation. CONFIG_DCACHE_RAM_BASE should be 4KiB
* aligned when using this option. */ * aligned when using this option. */
_pagetables = . ; REGION(pagetables, ., 4K * CONFIG_NUM_CAR_PAGE_TABLE_PAGES, 4K)
. += 4096 * CONFIG_NUM_CAR_PAGE_TABLE_PAGES;
_epagetables = . ;
#endif #endif
#if CONFIG(VBOOT_STARTS_IN_BOOTBLOCK) #if CONFIG(VBOOT_STARTS_IN_BOOTBLOCK)
/* Vboot work buffer only needs to be available when verified boot /* Vboot work buffer only needs to be available when verified boot
@ -28,9 +26,7 @@
/* Stack for CAR stages. Since it persists across all stages that /* Stack for CAR stages. Since it persists across all stages that
* use CAR it can be reused. The chipset/SoC is expected to provide * use CAR it can be reused. The chipset/SoC is expected to provide
* the stack size. */ * the stack size. */
_car_stack = .; REGION(car_stack, ., CONFIG_DCACHE_BSP_STACK_SIZE, 4)
. += CONFIG_DCACHE_BSP_STACK_SIZE;
_ecar_stack = .;
/* The pre-ram cbmem console as well as the timestamp region are fixed /* The pre-ram cbmem console as well as the timestamp region are fixed
* in size. Therefore place them above the car global section so that * in size. Therefore place them above the car global section so that
* multiple stages (romstage and verstage) have a consistent * multiple stages (romstage and verstage) have a consistent
@ -42,9 +38,7 @@
* totalling 32 bytes that need to be 32-byte aligned. The reason the * totalling 32 bytes that need to be 32-byte aligned. The reason the
* pdpt are not colocated with the rest of the page tables is to reduce * pdpt are not colocated with the rest of the page tables is to reduce
* fragmentation of the CAR space that persists across stages. */ * fragmentation of the CAR space that persists across stages. */
_pdpt = .; REGION(pdpt, ., 32, 32)
. += 32;
_epdpt = .;
#endif #endif
TIMESTAMP(., 0x200) TIMESTAMP(., 0x200)
@ -56,10 +50,8 @@
FMAP_CACHE(., FMAP_SIZE) FMAP_CACHE(., FMAP_SIZE)
#endif #endif
_car_ehci_dbg_info = .;
/* Reserve sizeof(struct ehci_dbg_info). */ /* Reserve sizeof(struct ehci_dbg_info). */
. += 80; REGION(car_ehci_dbg_info, ., 80, 1)
_ecar_ehci_dbg_info = .;
/* _bss and _ebss provide symbols to per-stage /* _bss and _ebss provide symbols to per-stage
* variables that are not shared like the timestamp and the pre-ram * variables that are not shared like the timestamp and the pre-ram
@ -75,6 +67,7 @@
*(.sbss.*) *(.sbss.*)
. = ALIGN(ARCH_POINTER_ALIGN_SIZE); . = ALIGN(ARCH_POINTER_ALIGN_SIZE);
_ebss = .; _ebss = .;
RECORD_SIZE(bss)
#if ENV_ROMSTAGE && CONFIG(ASAN_IN_ROMSTAGE) #if ENV_ROMSTAGE && CONFIG(ASAN_IN_ROMSTAGE)
_shadow_size = (_ebss - _car_region_start) >> 3; _shadow_size = (_ebss - _car_region_start) >> 3;

25
src/include/memlayout.h
View File

@ -33,22 +33,33 @@
SET_COUNTER(name, addr) \ SET_COUNTER(name, addr) \
_##name = ABSOLUTE(.); _##name = ABSOLUTE(.);
#define RECORD_SIZE(name) \
_##name##_size = ABSOLUTE(_e##name - _##name);
#define REGION(name, addr, size, expected_align) \ #define REGION(name, addr, size, expected_align) \
SYMBOL(name, addr) \ SYMBOL(name, addr) \
_ = ASSERT(. == ALIGN(expected_align), \ _ = ASSERT(. == ALIGN(expected_align), \
STR(name must be aligned to expected_align!)); \ STR(name must be aligned to expected_align!)); \
SYMBOL(e##name, addr + size) SYMBOL(e##name, addr + size) \
RECORD_SIZE(name)
#define ALIAS_REGION(name, alias) \ #define ALIAS_REGION(name, alias) \
_##alias = ABSOLUTE(_##name); \ _##alias = ABSOLUTE(_##name); \
_e##alias = ABSOLUTE(_e##name); \ _e##alias = ABSOLUTE(_e##name); \
RECORD_SIZE(alias)
#define REGION_START(name, addr) SYMBOL(name, addr)
#define REGION_END(name, addr) \
SYMBOL(e##name, addr) \
RECORD_SIZE(name)
/* Declare according to SRAM/DRAM ranges in SoC hardware-defined address map. */ /* Declare according to SRAM/DRAM ranges in SoC hardware-defined address map. */
#define SRAM_START(addr) SYMBOL(sram, addr) #define SRAM_START(addr) REGION_START(sram, addr)
#define SRAM_END(addr) SYMBOL(esram, addr) #define SRAM_END(addr) REGION_END(sram, addr)
#define DRAM_START(addr) SYMBOL(dram, addr) #define DRAM_START(addr) REGION_START(dram, addr)
#define TIMESTAMP(addr, size) \ #define TIMESTAMP(addr, size) \
REGION(timestamp, addr, size, 8) \ REGION(timestamp, addr, size, 8) \
@ -93,6 +104,7 @@
#define DECOMPRESSOR(addr, sz) \ #define DECOMPRESSOR(addr, sz) \
SYMBOL(decompressor, addr) \ SYMBOL(decompressor, addr) \
_edecompressor = ABSOLUTE(_decompressor + sz); \ _edecompressor = ABSOLUTE(_decompressor + sz); \
RECORD_SIZE(decompressor) \
_ = ASSERT(_eprogram - _program <= sz, \ _ = ASSERT(_eprogram - _program <= sz, \
STR(decompressor exceeded its allotted size! (sz))); \ STR(decompressor exceeded its allotted size! (sz))); \
INCLUDE "decompressor/lib/program.ld" INCLUDE "decompressor/lib/program.ld"
@ -113,6 +125,7 @@
#define BOOTBLOCK(addr, sz) \ #define BOOTBLOCK(addr, sz) \
SYMBOL(bootblock, addr) \ SYMBOL(bootblock, addr) \
_ebootblock = ABSOLUTE(_bootblock + sz); \ _ebootblock = ABSOLUTE(_bootblock + sz); \
RECORD_SIZE(bootblock) \
_ = ASSERT(_eprogram - _program <= sz, \ _ = ASSERT(_eprogram - _program <= sz, \
STR(Bootblock exceeded its allotted size! (sz))); \ STR(Bootblock exceeded its allotted size! (sz))); \
INCLUDE "bootblock/lib/program.ld" INCLUDE "bootblock/lib/program.ld"
@ -125,6 +138,7 @@
#define ROMSTAGE(addr, sz) \ #define ROMSTAGE(addr, sz) \
SYMBOL(romstage, addr) \ SYMBOL(romstage, addr) \
_eromstage = ABSOLUTE(_romstage + sz); \ _eromstage = ABSOLUTE(_romstage + sz); \
RECORD_SIZE(romstage) \
_ = ASSERT(_eprogram - _program <= sz, \ _ = ASSERT(_eprogram - _program <= sz, \
STR(Romstage exceeded its allotted size! (sz))); \ STR(Romstage exceeded its allotted size! (sz))); \
INCLUDE "romstage/lib/program.ld" INCLUDE "romstage/lib/program.ld"
@ -137,6 +151,7 @@
#define RAMSTAGE(addr, sz) \ #define RAMSTAGE(addr, sz) \
SYMBOL(ramstage, addr) \ SYMBOL(ramstage, addr) \
_eramstage = ABSOLUTE(_ramstage + sz); \ _eramstage = ABSOLUTE(_ramstage + sz); \
RECORD_SIZE(ramstage) \
_ = ASSERT(_eprogram - _program <= sz, \ _ = ASSERT(_eprogram - _program <= sz, \
STR(Ramstage exceeded its allotted size! (sz))); \ STR(Ramstage exceeded its allotted size! (sz))); \
INCLUDE "ramstage/lib/program.ld" INCLUDE "ramstage/lib/program.ld"
@ -161,6 +176,7 @@
#define VERSTAGE(addr, sz) \ #define VERSTAGE(addr, sz) \
SYMBOL(verstage, addr) \ SYMBOL(verstage, addr) \
_everstage = ABSOLUTE(_verstage + sz); \ _everstage = ABSOLUTE(_verstage + sz); \
RECORD_SIZE(verstage) \
_ = ASSERT(_eprogram - _program <= sz, \ _ = ASSERT(_eprogram - _program <= sz, \
STR(Verstage exceeded its allotted size! (sz))); \ STR(Verstage exceeded its allotted size! (sz))); \
INCLUDE "verstage/lib/program.ld" INCLUDE "verstage/lib/program.ld"
@ -180,6 +196,7 @@
#define POSTCAR(addr, sz) \ #define POSTCAR(addr, sz) \
SYMBOL(postcar, addr) \ SYMBOL(postcar, addr) \
_epostcar = ABSOLUTE(_postcar + sz); \ _epostcar = ABSOLUTE(_postcar + sz); \
RECORD_SIZE(postcar) \
_ = ASSERT(_eprogram - _program <= sz, \ _ = ASSERT(_eprogram - _program <= sz, \
STR(Aftercar exceeded its allotted size! (sz))); \ STR(Aftercar exceeded its allotted size! (sz))); \
INCLUDE "postcar/lib/program.ld" INCLUDE "postcar/lib/program.ld"

8
src/include/symbols.h
View File

@ -7,11 +7,12 @@
extern u8 _dram[]; extern u8 _dram[];
#define REGION_SIZE(name) (_e##name - _##name) #define REGION_SIZE(name) ((size_t)_##name##_size)
#define DECLARE_REGION(name) \ #define DECLARE_REGION(name) \
extern u8 _##name[]; \ extern u8 _##name[]; \
extern u8 _e##name[]; extern u8 _e##name[]; \
extern u8 _##name##_size[];
/* /*
* Regions can be declared optional if not all configurations provide them in * Regions can be declared optional if not all configurations provide them in
@ -23,7 +24,8 @@ extern u8 _dram[];
*/ */
#define DECLARE_OPTIONAL_REGION(name) \ #define DECLARE_OPTIONAL_REGION(name) \
__weak extern u8 _##name[]; \ __weak extern u8 _##name[]; \
__weak extern u8 _e##name[]; __weak extern u8 _e##name[]; \
__weak extern u8 _##name##_size[];
DECLARE_REGION(sram) DECLARE_REGION(sram)
DECLARE_OPTIONAL_REGION(timestamp) DECLARE_OPTIONAL_REGION(timestamp)

12
src/lib/program.ld
View File

@ -29,22 +29,26 @@
_cbmem_init_hooks = .; _cbmem_init_hooks = .;
KEEP(*(.rodata.cbmem_init_hooks)); KEEP(*(.rodata.cbmem_init_hooks));
_ecbmem_init_hooks = .; _ecbmem_init_hooks = .;
RECORD_SIZE(cbmem_init_hooks)
#endif #endif
. = ALIGN(ARCH_POINTER_ALIGN_SIZE); . = ALIGN(ARCH_POINTER_ALIGN_SIZE);
_rsbe_init_begin = .; _rsbe_init_begin = .;
KEEP(*(.rsbe_init)); KEEP(*(.rsbe_init));
_ersbe_init_begin = .; _ersbe_init_begin = .;
RECORD_SIZE(rsbe_init_begin)
#if ENV_RAMSTAGE #if ENV_RAMSTAGE
. = ALIGN(ARCH_POINTER_ALIGN_SIZE); . = ALIGN(ARCH_POINTER_ALIGN_SIZE);
_pci_drivers = .; _pci_drivers = .;
KEEP(*(.rodata.pci_driver)); KEEP(*(.rodata.pci_driver));
_epci_drivers = .; _epci_drivers = .;
RECORD_SIZE(pci_drivers)
. = ALIGN(ARCH_POINTER_ALIGN_SIZE); . = ALIGN(ARCH_POINTER_ALIGN_SIZE);
_cpu_drivers = .; _cpu_drivers = .;
KEEP(*(.rodata.cpu_driver)); KEEP(*(.rodata.cpu_driver));
_ecpu_drivers = .; _ecpu_drivers = .;
RECORD_SIZE(cpu_drivers)
#endif #endif
. = ALIGN(ARCH_POINTER_ALIGN_SIZE); . = ALIGN(ARCH_POINTER_ALIGN_SIZE);
@ -52,6 +56,7 @@
*(.rodata.*); *(.rodata.*);
. = ALIGN(ARCH_POINTER_ALIGN_SIZE); . = ALIGN(ARCH_POINTER_ALIGN_SIZE);
_etext = .; _etext = .;
RECORD_SIZE(text)
} : to_load } : to_load
#if ENV_RAMSTAGE && (CONFIG(COVERAGE) || CONFIG(ASAN_IN_RAMSTAGE)) #if ENV_RAMSTAGE && (CONFIG(COVERAGE) || CONFIG(ASAN_IN_RAMSTAGE))
@ -82,6 +87,7 @@
_rmodule_params = .; _rmodule_params = .;
KEEP(*(.module_parameters)); KEEP(*(.module_parameters));
_ermodule_params = .; _ermodule_params = .;
RECORD_SIZE(rmodule_params)
#endif #endif
*(.data); *(.data);
@ -92,6 +98,7 @@
#if ENV_ROMSTAGE_OR_BEFORE #if ENV_ROMSTAGE_OR_BEFORE
PROVIDE(_preram_cbmem_console = .); PROVIDE(_preram_cbmem_console = .);
PROVIDE(_epreram_cbmem_console = _preram_cbmem_console); PROVIDE(_epreram_cbmem_console = _preram_cbmem_console);
PROVIDE(_preram_cbmem_console_size = ABSOLUTE(0));
#elif ENV_RAMSTAGE #elif ENV_RAMSTAGE
. = ALIGN(ARCH_POINTER_ALIGN_SIZE); . = ALIGN(ARCH_POINTER_ALIGN_SIZE);
_bs_init_begin = .; _bs_init_begin = .;
@ -99,10 +106,12 @@
LONG(0); LONG(0);
LONG(0); LONG(0);
_ebs_init_begin = .; _ebs_init_begin = .;
RECORD_SIZE(bs_init_begin)
#endif #endif
. = ALIGN(ARCH_POINTER_ALIGN_SIZE); . = ALIGN(ARCH_POINTER_ALIGN_SIZE);
_edata = .; _edata = .;
RECORD_SIZE(data)
} }
#endif #endif
@ -116,6 +125,7 @@
*(.sbss.*) *(.sbss.*)
. = ALIGN(ARCH_POINTER_ALIGN_SIZE); . = ALIGN(ARCH_POINTER_ALIGN_SIZE);
_ebss = .; _ebss = .;
RECORD_SIZE(bss)
} }
#endif #endif
@ -126,6 +136,7 @@
. += (ENV_RMODULE ? __heap_size : CONFIG_HEAP_SIZE); . += (ENV_RMODULE ? __heap_size : CONFIG_HEAP_SIZE);
. = ALIGN(ARCH_POINTER_ALIGN_SIZE); . = ALIGN(ARCH_POINTER_ALIGN_SIZE);
_eheap = .; _eheap = .;
RECORD_SIZE(heap)
} }
#endif #endif
@ -135,6 +146,7 @@
#endif #endif
_eprogram = .; _eprogram = .;
RECORD_SIZE(program)
/* Discard the sections we don't need/want */ /* Discard the sections we don't need/want */

4
src/mainboard/emulation/qemu-aarch64/bootblock.c
View File

@ -4,8 +4,6 @@
#include <bootblock_common.h> #include <bootblock_common.h>
#include <symbols.h> #include <symbols.h>
extern u8 _secram[], _esecram[];
void bootblock_mainboard_init(void) void bootblock_mainboard_init(void)
{ {
mmu_init(); mmu_init();
@ -20,7 +18,7 @@ void bootblock_mainboard_init(void)
mmu_config_range(_romstage, REGION_SIZE(romstage), MA_MEM | MA_S | MA_RW); mmu_config_range(_romstage, REGION_SIZE(romstage), MA_MEM | MA_S | MA_RW);
mmu_config_range(_ramstage, REGION_SIZE(ramstage), MA_MEM | MA_S | MA_RW); mmu_config_range(_ramstage, REGION_SIZE(ramstage), MA_MEM | MA_S | MA_RW);
mmu_config_range(_secram, REGION_SIZE(secram), MA_MEM | MA_S | MA_RW); mmu_config_range(_bl31, REGION_SIZE(bl31), MA_MEM | MA_S | MA_RW);
mmu_enable(); mmu_enable();
} }

4
src/mainboard/emulation/qemu-aarch64/mainboard.c
View File

@ -5,11 +5,9 @@
#include <device/device.h> #include <device/device.h>
#include <bootmem.h> #include <bootmem.h>
extern u8 _secram[], _esecram[];
void bootmem_platform_add_ranges(void) void bootmem_platform_add_ranges(void)
{ {
bootmem_add_range((uintptr_t)_secram, REGION_SIZE(secram), BM_MEM_BL31); bootmem_add_range((uintptr_t)_bl31, REGION_SIZE(bl31), BM_MEM_BL31);
} }
static void mainboard_enable(struct device *dev) static void mainboard_enable(struct device *dev)

2
src/mainboard/emulation/qemu-aarch64/memlayout.ld
View File

@ -16,7 +16,7 @@ SECTIONS
{ {
REGION(flash, 0x00000000, CONFIG_ROM_SIZE, 8) REGION(flash, 0x00000000, CONFIG_ROM_SIZE, 8)
REGION(secram, 0xe000000, 0x1000000, 4096) BL31(0xe000000, 0x1000000)
DRAM_START(0x40000000) DRAM_START(0x40000000)
BOOTBLOCK(0x60010000, 64K) BOOTBLOCK(0x60010000, 64K)
STACK(0x60020000, 54K) STACK(0x60020000, 54K)

8
src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld
View File

@ -4,11 +4,11 @@
#include <arch/header.ld> #include <arch/header.ld>
#include <soc/psp_transfer.h> #include <soc/psp_transfer.h>
#define EARLY_RESERVED_DRAM_START(addr) SYMBOL(early_reserved_dram, addr) #define EARLY_RESERVED_DRAM_START(addr) REGION_START(early_reserved_dram, addr)
#define EARLY_RESERVED_DRAM_END(addr) SYMBOL(eearly_reserved_dram, addr) #define EARLY_RESERVED_DRAM_END(addr) REGION_END(early_reserved_dram, addr)
#define PSP_SHAREDMEM_DRAM_START(addr) SYMBOL(psp_sharedmem_dram, addr) #define PSP_SHAREDMEM_DRAM_START(addr) REGION_START(psp_sharedmem_dram, addr)
#define PSP_SHAREDMEM_DRAM_END(addr) SYMBOL(epsp_sharedmem_dram, addr) #define PSP_SHAREDMEM_DRAM_END(addr) REGION_END(psp_sharedmem_dram, addr)
BOOTBLOCK_END = CONFIG_ROMSTAGE_ADDR; BOOTBLOCK_END = CONFIG_ROMSTAGE_ADDR;
BOOTBLOCK_ADDR = BOOTBLOCK_END - CONFIG_C_ENV_BOOTBLOCK_SIZE; BOOTBLOCK_ADDR = BOOTBLOCK_END - CONFIG_C_ENV_BOOTBLOCK_SIZE;

4
src/soc/mediatek/mt8173/memlayout.ld
View File

@ -9,8 +9,8 @@
* It will be returned before starting the ramstage. * It will be returned before starting the ramstage.
* SRAM_L2C and SRAM can be cached, but only SRAM is DMA-able. * SRAM_L2C and SRAM can be cached, but only SRAM is DMA-able.
*/ */
#define SRAM_L2C_START(addr) SYMBOL(sram_l2c, addr) #define SRAM_L2C_START(addr) REGION_START(sram_l2c, addr)
#define SRAM_L2C_END(addr) SYMBOL(esram_l2c, addr) #define SRAM_L2C_END(addr) REGION_END(sram_l2c, addr)
#define DRAM_DMA(addr, size) \ #define DRAM_DMA(addr, size) \
REGION(dram_dma, addr, size, 4K) \ REGION(dram_dma, addr, size, 4K) \

4
src/soc/mediatek/mt8183/memlayout.ld
View File

@ -9,8 +9,8 @@
* It will be returned before starting the ramstage. * It will be returned before starting the ramstage.
* SRAM_L2C and SRAM can be cached, but only SRAM is DMA-able. * SRAM_L2C and SRAM can be cached, but only SRAM is DMA-able.
*/ */
#define SRAM_L2C_START(addr) SYMBOL(sram_l2c, addr) #define SRAM_L2C_START(addr) REGION_START(sram_l2c, addr)
#define SRAM_L2C_END(addr) SYMBOL(esram_l2c, addr) #define SRAM_L2C_END(addr) REGION_END(sram_l2c, addr)
#define DRAM_INIT_CODE(addr, size) \ #define DRAM_INIT_CODE(addr, size) \
REGION(dram_init_code, addr, size, 4) REGION(dram_init_code, addr, size, 4)

4
src/soc/mediatek/mt8192/include/soc/memlayout.ld
View File

@ -9,8 +9,8 @@
* It will be returned before starting the ramstage. * It will be returned before starting the ramstage.
* SRAM_L2C and SRAM can be cached, but only SRAM is DMA-able. * SRAM_L2C and SRAM can be cached, but only SRAM is DMA-able.
*/ */
#define SRAM_L2C_START(addr) SYMBOL(sram_l2c, addr) #define SRAM_L2C_START(addr) REGION_START(sram_l2c, addr)
#define SRAM_L2C_END(addr) SYMBOL(esram_l2c, addr) #define SRAM_L2C_END(addr) REGION_END(sram_l2c, addr)
#define DRAM_INIT_CODE(addr, size) \ #define DRAM_INIT_CODE(addr, size) \
REGION(dram_init_code, addr, size, 64K) REGION(dram_init_code, addr, size, 64K)

3
src/soc/qualcomm/ipq40xx/memlayout.ld
View File

@ -4,9 +4,6 @@
#include <arch/header.ld> #include <arch/header.ld>
#define REGION_START(name, addr) SYMBOL(name, addr)
#define REGION_END(name, addr) SYMBOL(e##name, addr)
SECTIONS SECTIONS
{ {
REGION(oc_imem, 0x08600000, 32K, 0) REGION(oc_imem, 0x08600000, 32K, 0)

8
src/soc/qualcomm/qcs405/memlayout.ld
View File

@ -4,12 +4,12 @@
#include <arch/header.ld> #include <arch/header.ld>
/* SYSTEM_IMEM : 0x8600000 - 0x8607FFF */ /* SYSTEM_IMEM : 0x8600000 - 0x8607FFF */
#define SSRAM_START(addr) SYMBOL(ssram, addr) #define SSRAM_START(addr) REGION_START(ssram, addr)
#define SSRAM_END(addr) SYMBOL(essram, addr) #define SSRAM_END(addr) REGION_END(ssram, addr)
/* BOOT_IMEM : 0x8C00000 - 0x8D80000 */ /* BOOT_IMEM : 0x8C00000 - 0x8D80000 */
#define BSRAM_START(addr) SYMBOL(bsram, addr) #define BSRAM_START(addr) REGION_START(bsram, addr)
#define BSRAM_END(addr) SYMBOL(ebsram, addr) #define BSRAM_END(addr) REGION_END(bsram, addr)
SECTIONS SECTIONS
{ {

12
src/soc/qualcomm/sc7180/memlayout.ld
View File

@ -4,16 +4,16 @@
#include <arch/header.ld> #include <arch/header.ld>
/* SYSTEM_IMEM : 0x14680000 - 0x146AE000 */ /* SYSTEM_IMEM : 0x14680000 - 0x146AE000 */
#define SSRAM_START(addr) SYMBOL(ssram, addr) #define SSRAM_START(addr) REGION_START(ssram, addr)
#define SSRAM_END(addr) SYMBOL(essram, addr) #define SSRAM_END(addr) REGION_END(ssram, addr)
/* BOOT_IMEM : 0x14800000 - 0x14980000 */ /* BOOT_IMEM : 0x14800000 - 0x14980000 */
#define BSRAM_START(addr) SYMBOL(bsram, addr) #define BSRAM_START(addr) REGION_START(bsram, addr)
#define BSRAM_END(addr) SYMBOL(ebsram, addr) #define BSRAM_END(addr) REGION_END(bsram, addr)
/* AOP : 0x0B000000 - 0x0B100000 */ /* AOP : 0x0B000000 - 0x0B100000 */
#define AOPSRAM_START(addr) SYMBOL(aopsram, addr) #define AOPSRAM_START(addr) REGION_START(aopsram, addr)
#define AOPSRAM_END(addr) SYMBOL(eaopsram, addr) #define AOPSRAM_END(addr) REGION_END(aopsram, addr)
SECTIONS SECTIONS
{ {

4
src/soc/rockchip/rk3288/memlayout.ld
View File

@ -28,8 +28,8 @@ SECTIONS
/* 4K of special SRAM in PMU power domain. /* 4K of special SRAM in PMU power domain.
* Careful: only supports 32-bit wide write accesses! */ * Careful: only supports 32-bit wide write accesses! */
SYMBOL(pmu_sram, 0xFF720000) REGION_START(pmu_sram, 0xFF720000)
TTB_SUBTABLES(0xFF720800, 1K) TTB_SUBTABLES(0xFF720800, 1K)
WATCHDOG_TOMBSTONE(0xFF720FFC, 4) WATCHDOG_TOMBSTONE(0xFF720FFC, 4)
SYMBOL(epmu_sram, 0xFF721000) REGION_END(pmu_sram, 0xFF721000)
} }

4
src/soc/rockchip/rk3399/memlayout.ld
View File

@ -12,9 +12,9 @@ SECTIONS
DMA_COHERENT(0x10000000, 2M) DMA_COHERENT(0x10000000, 2M)
/* 8K of special SRAM in PMU power domain. */ /* 8K of special SRAM in PMU power domain. */
SYMBOL(pmu_sram, 0xFF3B0000) REGION_START(pmu_sram, 0xFF3B0000)
WATCHDOG_TOMBSTONE(0xFF3B1FFC, 4) WATCHDOG_TOMBSTONE(0xFF3B1FFC, 4)
SYMBOL(epmu_sram, 0xFF3B2000) REGION_END(pmu_sram, 0xFF3B2000)
SRAM_START(0xFF8C0000) SRAM_START(0xFF8C0000)
#if ENV_RAMSTAGE #if ENV_RAMSTAGE

4
src/soc/sifive/fu540/memlayout.ld
View File

@ -5,8 +5,8 @@
#include <arch/header.ld> #include <arch/header.ld>
#define L2LIM_START(addr) SYMBOL(l2lim, addr) #define L2LIM_START(addr) REGION_START(l2lim, addr)
#define L2LIM_END(addr) SYMBOL(el2lim, addr) #define L2LIM_END(addr) REGION_END(l2lim, addr)
SECTIONS SECTIONS
{ {

3
tests/include/tests/test.h
View File

@ -26,6 +26,7 @@
* Create end symbol for it. * Create end symbol for it.
*/ */
#define TEST_REGION(region, size) uint8_t _##region[size]; \ #define TEST_REGION(region, size) uint8_t _##region[size]; \
TEST_SYMBOL(_e##region, _##region + size) TEST_SYMBOL(_e##region, _##region + size); \
TEST_SYMBOL(_##region##_size, size)
#endif /* _TESTS_TEST_H */ #endif /* _TESTS_TEST_H */