GNUBoot/coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

*** empty log message ***

Browse source 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1287 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Greg Watson 2003-11-15 15:28:05 +00:00
parent d57923c870
commit 8334882015
2 changed files with 7 additions and 5 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
src/mainboard/motorola/sandpoint/Config.lb
View file

@ -17,8 +17,8 @@ uses PNP_CFGDATA
## ##
default PCIC0_CFGADDR=0xfec00000 default PCIC0_CFGADDR=0xfec00000
default PCIC0_CFGDATA=0xfee00000 default PCIC0_CFGDATA=0xfee00000
default PNP_CFGADDR=0x15c default PNP_CFGADDR=0xfe00015c
default PNP_CFGDATA=0x15d default PNP_CFGDATA=0xfe00015d
## ##
## Early board initialization, called from ppc_main() ## Early board initialization, called from ppc_main()

8
src/mainboard/motorola/sandpoint/init.c
View file

@ -33,6 +33,7 @@
#include <ppc_asm.tmpl> #include <ppc_asm.tmpl>
#include <ppc.h> #include <ppc.h>
#include <arch/io.h> #include <arch/io.h>
#include <printk.h>
void pnp_output(char address, char data) void pnp_output(char address, char data)
{ {
@ -56,8 +57,9 @@ board_init(void)
*/ */
pnp_output(0x07, 6); /* LD 6 = UART0 */ pnp_output(0x07, 6); /* LD 6 = UART0 */
pnp_output(0x30, 0); /* Dectivate */ pnp_output(0x30, 0); /* Dectivate */
pnp_output(0x60, TTYS0_BASE >> 8); /* IO Base */ pnp_output(0x60, UART0_IO_BASE >> 8); /* IO Base */
pnp_output(0x61, TTYS0_BASE & 0xFF); /* IO Base */ pnp_output(0x61, UART0_IO_BASE & 0xFF); /* IO Base */
pnp_output(0x30, 1); /* Activate */ pnp_output(0x30, 1); /* Activate */
uart8250_init(UART0_IO_BASE, 115200/TTYS0_BAUD, TTYS0_LCS); uart8250_init(TTYS0_BASE, 115200/TTYS0_BAUD, TTYS0_LCS);
printk_info("Board initialized...\n");
} }