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AGESA: Remove redundant redeclaration 

Change-Id: I9172769c314850b384abbddf0200d5833e2a8b26
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7811
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Kyösti Mälkki 2014-12-14 11:24:36 +02:00 committed by Stefan Reinauer
parent 483bed33a9
commit 8548a4888a
4 changed files with 2 additions and 6 deletions
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2
src/northbridge/amd/agesa/agesawrapper.h
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@ -24,8 +24,6 @@
#include "Porting.h" #include "Porting.h"
#include "AGESA.h" #include "AGESA.h"
#define PCIE_BASE_ADDRESS CONFIG_MMCONF_BASE_ADDRESS
enum { enum {
PICK_DMI, /* DMI Interface */ PICK_DMI, /* DMI Interface */
PICK_PSTATE, /* Acpi Pstate SSDT Table */ PICK_PSTATE, /* Acpi Pstate SSDT Table */

2
src/northbridge/amd/agesa/family12/agesawrapper.c
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@ -151,7 +151,7 @@ AGESA_STATUS agesawrapper_amdinitcpuio(VOID)
PciData = 0x00FFFF00 | 0x80; PciData = 0x00FFFF00 | 0x80;
LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
PciAddress.AddressValue = MAKE_SBDFO(0, 0, 0x18, 1, 0xB8); PciAddress.AddressValue = MAKE_SBDFO(0, 0, 0x18, 1, 0xB8);
PciData = (PCIE_BASE_ADDRESS >> 8) | 03; PciData = (CONFIG_MMCONF_BASE_ADDRESS >> 8) | 03;
LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
/* Start to set PCIIO 0000-FFFF to Node0 Link0 with ISA&VGA set. */ /* Start to set PCIIO 0000-FFFF to Node0 Link0 with ISA&VGA set. */
PciAddress.AddressValue = MAKE_SBDFO(0, 0, 0x18, 1, 0xC4); PciAddress.AddressValue = MAKE_SBDFO(0, 0, 0x18, 1, 0xC4);

2
src/northbridge/amd/agesa/family15/agesawrapper.c
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@ -136,7 +136,7 @@ AGESA_STATUS agesawrapper_amdinitcpuio(void)
PciData |= sblink << 4; PciData |= sblink << 4;
LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
PciAddress.AddressValue = MAKE_SBDFO(0, 0, CONFIG_CDB + node, FUNC_1, 0xB8); PciAddress.AddressValue = MAKE_SBDFO(0, 0, CONFIG_CDB + node, FUNC_1, 0xB8);
PciData = (PCIE_BASE_ADDRESS >> 8) | 0x03; PciData = (CONFIG_MMCONF_BASE_ADDRESS >> 8) | 0x03;
LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
/* Set PCIO: 0x0 - 0xFFF000 to Node0 sbLink and enabled VGA IO */ /* Set PCIO: 0x0 - 0xFFF000 to Node0 sbLink and enabled VGA IO */

2
src/northbridge/amd/pi/agesawrapper.h
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@ -24,8 +24,6 @@
#include "Porting.h" #include "Porting.h"
#include "AGESA.h" #include "AGESA.h"
#define PCIE_BASE_ADDRESS CONFIG_MMCONF_BASE_ADDRESS
enum { enum {
PICK_DMI, /* DMI Interface */ PICK_DMI, /* DMI Interface */
PICK_PSTATE, /* Acpi Pstate SSDT Table */ PICK_PSTATE, /* Acpi Pstate SSDT Table */