in vt8237r_enable(), write function enables only to ISA bridge config space

vt8237r_enable() so far wrote the function enable values to the same
offset in the config space of every one of the vt8237's functions,
even though the register is located in the ISA bridge only.

Change-Id: I639586dc238132f5b8d2f320b794948718281b9c
Signed-off-by: Florian Zumbiehl <florz@florz.de>
Reviewed-on: http://review.coreboot.org/368
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Florian Zumbiehl 2011-11-01 20:16:16 +01:00 committed by Patrick Georgi
parent 7e9de01c47
commit 86bb0072b6
1 changed files with 12 additions and 2 deletions

View File

@ -66,11 +66,21 @@ void dump_south(device_t dev)
static void vt8237r_enable(struct device *dev) static void vt8237r_enable(struct device *dev)
{ {
u16 vid, did;
struct southbridge_via_vt8237r_config *sb = struct southbridge_via_vt8237r_config *sb =
(struct southbridge_via_vt8237r_config *)dev->chip_info; (struct southbridge_via_vt8237r_config *)dev->chip_info;
if (dev->path.type == DEVICE_PATH_PCI) {
vid = pci_read_config16(dev, PCI_VENDOR_ID);
did = pci_read_config16(dev, PCI_DEVICE_ID);
if (vid == PCI_VENDOR_ID_VIA &&
(did == PCI_DEVICE_ID_VIA_VT8237R_LPC ||
did == PCI_DEVICE_ID_VIA_VT8237A_LPC ||
did == PCI_DEVICE_ID_VIA_VT8237S_LPC)) {
pci_write_config8(dev, 0x50, sb->fn_ctrl_lo); pci_write_config8(dev, 0x50, sb->fn_ctrl_lo);
pci_write_config8(dev, 0x51, sb->fn_ctrl_hi); pci_write_config8(dev, 0x51, sb->fn_ctrl_hi);
}
}
/* TODO: If SATA is disabled, move IDE to fn0 to conform PCI specs. */ /* TODO: If SATA is disabled, move IDE to fn0 to conform PCI specs. */
} }