AGESA fam15tn boards: Clean up devicetree
Remove double nesting of chip northbridge/amd. There is requirement to keep SPD address map in the same chip block with device 0:18.2. Change-Id: I67fcb59a63046865f660e628a61c2944b0f89a74 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/30734 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: mikeb mikeb <mikebdp2@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kyösti Mälkki
parent
4ebdf34e13
commit
872b42486a
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@ -22,50 +22,49 @@ chip northbridge/amd/agesa/family15tn/root_complex
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device domain 0 on
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device domain 0 on
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subsystemid 0x1022 0x1410 inherit
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subsystemid 0x1022 0x1410 inherit
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chip northbridge/amd/agesa/family15tn # CPU side of HT root complex
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chip northbridge/amd/agesa/family15tn
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device pci 0.0 on end # Root Complex
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device pci 1.0 on end # Internal Graphics P2P bridge 0x99XX
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device pci 1.1 on end # Internal Multimedia
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device pci 2.0 on end # PCIE SLOT0 x16
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device pci 3.0 off end
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device pci 4.0 on end # PCIE MINI0
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device pci 5.0 on end # PCIE MINI1
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device pci 6.0 on end # PCIE Slot1 x1
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device pci 7.0 on end # LAN
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device pci 8.0 off end # NB/SB Link P2P bridge
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end #chip northbridge/amd/agesa/family15tn
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chip northbridge/amd/agesa/family15tn # PCI side of HT root complex
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chip southbridge/amd/agesa/hudson
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device pci 0.0 on end # Root Complex
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device pci 10.0 on end # XHCI HC0
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device pci 1.0 on end # Internal Graphics P2P bridge 0x99XX
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device pci 10.1 on end # XHCI HC1
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device pci 1.1 on end # Internal Multimedia
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device pci 11.0 on end # SATA
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device pci 2.0 on end # PCIE SLOT0 x16
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device pci 12.0 on end # USB
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device pci 3.0 off end
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device pci 12.2 on end # USB
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device pci 4.0 on end # PCIE MINI0
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device pci 13.0 on end # USB
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device pci 5.0 on end # PCIE MINI1
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device pci 13.2 on end # USB
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device pci 6.0 on end # PCIE Slot1 x1
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device pci 14.0 on # SMBUS
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device pci 7.0 on end # LAN
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chip drivers/generic/generic #dimm 0
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device pci 8.0 off end # NB/SB Link P2P bridge
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device i2c 50 on end # 7-bit SPD address
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end #chip northbridge/amd/agesa/family15tn # PCI side of HT root complex
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end
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chip drivers/generic/generic #dimm 1
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chip southbridge/amd/agesa/hudson # it is under NB/SB Link, but on the same pci bus
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device i2c 51 on end # 7-bit SPD address
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device pci 10.0 on end # XHCI HC0
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end
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device pci 10.1 on end # XHCI HC1
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end # SM
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device pci 11.0 on end # SATA
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device pci 14.1 on end # IDE 0x439c
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device pci 12.0 on end # USB
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device pci 14.2 on end # HDA 0x4383
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device pci 12.2 on end # USB
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device pci 14.3 on end # LPC 0x439d
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device pci 13.0 on end # USB
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device pci 14.4 on end # PCI 0x4384 # PCI-b conflict with GPIO.
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device pci 13.2 on end # USB
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device pci 14.5 on end # USB 2
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device pci 14.0 on # SMBUS
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device pci 14.6 off end # Gec
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chip drivers/generic/generic #dimm 0
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device pci 14.7 on end # SD
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device i2c 50 on end # 7-bit SPD address
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device pci 15.0 off end # PCIe 0
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end
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device pci 15.1 off end # PCIe 1
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chip drivers/generic/generic #dimm 1
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device pci 15.2 off end # PCIe 2
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device i2c 51 on end # 7-bit SPD address
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device pci 15.3 off end # PCIe 3
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end
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end #chip southbridge/amd/agesa/hudson
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end # SM
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device pci 14.1 on end # IDE 0x439c
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device pci 14.2 on end # HDA 0x4383
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device pci 14.3 on end # LPC 0x439d
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device pci 14.4 on end # PCI 0x4384 # PCI-b conflict with GPIO.
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device pci 14.5 on end # USB 2
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device pci 14.6 off end # Gec
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device pci 14.7 on end # SD
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device pci 15.0 off end # PCIe 0
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device pci 15.1 off end # PCIe 1
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device pci 15.2 off end # PCIe 2
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device pci 15.3 off end # PCIe 3
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end #chip southbridge/amd/agesa/hudson
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chip northbridge/amd/agesa/family15tn
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device pci 18.0 on end
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device pci 18.0 on end
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device pci 18.1 on end
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device pci 18.1 on end
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device pci 18.2 on end
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device pci 18.2 on end
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@ -78,7 +77,7 @@ chip northbridge/amd/agesa/family15tn/root_complex
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{ {0xA0, 0x00}, {0xA2, 0x00}, }, // socket 0 - Channel 0 & 1 - 8-bit SPD addresses
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{ {0xA0, 0x00}, {0xA2, 0x00}, }, // socket 0 - Channel 0 & 1 - 8-bit SPD addresses
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{ {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 - 8-bit SPD addresses
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{ {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 - 8-bit SPD addresses
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}"
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}"
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end
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end #chip northbridge/amd/agesa/family15tn # CPU side of HT root complex
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end #domain
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end #domain
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end #chip northbridge/amd/agesa/family15tn/root_complex
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end #chip northbridge/amd/agesa/family15tn/root_complex
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@ -22,65 +22,64 @@ chip northbridge/amd/agesa/family15tn/root_complex
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device domain 0 on
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device domain 0 on
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subsystemid 0x1022 0x1410 inherit
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subsystemid 0x1022 0x1410 inherit
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chip northbridge/amd/agesa/family15tn # CPU side of HT root complex
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chip northbridge/amd/agesa/family15tn
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device pci 0.0 on end # Root Complex
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device pci 1.0 on end # Internal Graphics P2P bridge 0x99XX
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device pci 1.1 on end # Internal Multimedia
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device pci 2.0 on end # PCIE SLOT0 x8
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device pci 3.0 off end
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device pci 4.0 on end # LAN
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device pci 5.0 on end # PCIE MINI0
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device pci 6.0 on end # PCIE MINI1
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device pci 7.0 off end
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device pci 8.0 off end # NB/SB Link P2P bridge
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end #chip northbridge/amd/agesa/family15tn
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chip northbridge/amd/agesa/family15tn # PCI side of HT root complex
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chip southbridge/amd/agesa/hudson
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device pci 0.0 on end # Root Complex
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device pci 10.0 on end # XHCI HC0
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device pci 1.0 on end # Internal Graphics P2P bridge 0x99XX
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device pci 10.1 on end # XHCI HC1
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device pci 1.1 on end # Internal Multimedia
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device pci 11.0 on end # SATA
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device pci 2.0 on end # PCIE SLOT0 x8
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device pci 12.0 on end # USB
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device pci 3.0 off end
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device pci 12.2 on end # USB
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device pci 4.0 on end # LAN
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device pci 13.0 on end # USB
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device pci 5.0 on end # PCIE MINI0
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device pci 13.2 on end # USB
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device pci 6.0 on end # PCIE MINI1
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device pci 14.0 on # SMBUS
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device pci 7.0 off end
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chip drivers/generic/generic #dimm 0
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device pci 8.0 off end # NB/SB Link P2P bridge
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device i2c 50 on end # 7-bit SPD address
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end #chip northbridge/amd/agesa/family15tn # PCI side of HT root complex
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end
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chip drivers/generic/generic #dimm 1
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chip southbridge/amd/agesa/hudson # it is under NB/SB Link, but on the same pci bus
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device i2c 51 on end # 7-bit SPD address
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device pci 10.0 on end # XHCI HC0
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end
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device pci 10.1 on end # XHCI HC1
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end # SM
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device pci 11.0 on end # SATA
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device pci 14.1 on end # IDE 0x439c
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device pci 12.0 on end # USB
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device pci 14.2 on end # HDA 0x4383
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device pci 12.2 on end # USB
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device pci 14.3 on # LPC 0x439d
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device pci 13.0 on end # USB
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chip superio/smsc/lpc47n217
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device pci 13.2 on end # USB
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device pnp 2e.3 off # Parallel
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device pci 14.0 on # SMBUS
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io 0x60 = 0x378
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chip drivers/generic/generic #dimm 0
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irq 0x70 = 7
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device i2c 50 on end # 7-bit SPD address
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end
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end
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chip drivers/generic/generic #dimm 1
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device pnp 2e.4 on # Com1
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device i2c 51 on end # 7-bit SPD address
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io 0x60 = 0x3f8
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irq 0x70 = 4
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end
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end
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end # SM
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device pnp 2e.5 off # Com2
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device pci 14.1 on end # IDE 0x439c
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io 0x60 = 0x2f8
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device pci 14.2 on end # HDA 0x4383
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irq 0x70 = 3
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device pci 14.3 on # LPC 0x439d
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end
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chip superio/smsc/lpc47n217
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end #chip superio/smsc/lpc47n217
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device pnp 2e.3 off # Parallel
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end #device pci 14.3 # LPC
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io 0x60 = 0x378
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device pci 14.4 on end # PCI 0x4384 # PCI-b conflict with GPIO.
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irq 0x70 = 7
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device pci 14.5 on end # USB 2
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end
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device pci 14.6 off end # Gec
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device pnp 2e.4 on # Com1
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device pci 14.7 on end # SD
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io 0x60 = 0x3f8
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device pci 15.0 off end # PCIe 0
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irq 0x70 = 4
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device pci 15.1 off end # PCIe 1
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end
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device pci 15.2 off end # PCIe 2
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device pnp 2e.5 off # Com2
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device pci 15.3 off end # PCIe 3
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io 0x60 = 0x2f8
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end #chip southbridge/amd/agesa/hudson
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irq 0x70 = 3
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end
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end #chip superio/smsc/lpc47n217
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end #device pci 14.3 # LPC
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device pci 14.4 on end # PCI 0x4384 # PCI-b conflict with GPIO.
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device pci 14.5 on end # USB 2
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device pci 14.6 off end # Gec
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device pci 14.7 on end # SD
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device pci 15.0 off end # PCIe 0
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device pci 15.1 off end # PCIe 1
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device pci 15.2 off end # PCIe 2
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device pci 15.3 off end # PCIe 3
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end #chip southbridge/amd/agesa/hudson
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chip northbridge/amd/agesa/family15tn
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device pci 18.0 on end
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device pci 18.0 on end
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device pci 18.1 on end
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device pci 18.1 on end
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device pci 18.2 on end
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device pci 18.2 on end
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@ -93,7 +92,7 @@ chip northbridge/amd/agesa/family15tn/root_complex
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{ {0xA0, 0x00}, {0xA2, 0x00}, }, // socket 0 - Channel 0 & 1 - 8-bit SPD addresses
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{ {0xA0, 0x00}, {0xA2, 0x00}, }, // socket 0 - Channel 0 & 1 - 8-bit SPD addresses
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{ {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 - 8-bit SPD addresses
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{ {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 - 8-bit SPD addresses
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}"
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}"
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end
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end #chip northbridge/amd/agesa/family15tn # CPU side of HT root complex
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end #domain
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end #domain
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end #chip northbridge/amd/agesa/family15tn/root_complex
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end #chip northbridge/amd/agesa/family15tn/root_complex
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@ -22,51 +22,50 @@ chip northbridge/amd/agesa/family15tn/root_complex
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device domain 0 on
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device domain 0 on
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subsystemid 0x1022 0x1410 inherit
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subsystemid 0x1022 0x1410 inherit
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chip northbridge/amd/agesa/family15tn # CPU side of HT root complex
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chip northbridge/amd/agesa/family15tn
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device pci 0.0 on end # Root Complex
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device pci 0.2 on end # IOMMU
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device pci 1.0 on end # Internal Graphics P2P bridge 0x99XX
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device pci 1.1 on end # Internal Multimedia
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device pci 3.0 off end
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device pci 4.0 on end # PCIE MINI0
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device pci 5.0 on end # PCIE MINI1
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device pci 8.0 off end # NB/SB Link P2P bridge
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end #chip northbridge/amd/agesa/family15tn
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chip northbridge/amd/agesa/family15tn # PCI side of HT root complex
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chip southbridge/amd/agesa/hudson
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device pci 0.0 on end # Root Complex
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device pci 10.0 on end # XHCI HC0
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device pci 0.2 on end # IOMMU
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device pci 11.0 on end # SATA
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device pci 1.0 on end # Internal Graphics P2P bridge 0x99XX
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device pci 12.0 on end # USB
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device pci 1.1 on end # Internal Multimedia
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device pci 12.2 on end # USB
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device pci 3.0 off end
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device pci 13.0 on end # USB
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device pci 4.0 on end # PCIE MINI0
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device pci 13.2 on end # USB
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device pci 5.0 on end # PCIE MINI1
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device pci 14.0 on # SMBUS
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device pci 8.0 off end # NB/SB Link P2P bridge
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chip drivers/generic/generic #dimm 0
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end #chip northbridge/amd/agesa/family15tn # PCI side of HT root complex
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device i2c 50 on end # 7-bit SPD address
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chip southbridge/amd/agesa/hudson # it is under NB/SB Link, but on the same pci bus
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device pci 10.0 on end # XHCI HC0
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device pci 11.0 on end # SATA
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device pci 12.0 on end # USB
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device pci 12.2 on end # USB
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device pci 13.0 on end # USB
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device pci 13.2 on end # USB
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device pci 14.0 on # SMBUS
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chip drivers/generic/generic #dimm 0
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device i2c 50 on end # 7-bit SPD address
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end
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chip drivers/generic/generic #dimm 1
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device i2c 51 on end # 7-bit SPD address
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end
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end # SM
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device pci 14.2 on end # HDA 0x4383
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device pci 14.3 on # LPC 0x439d
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chip ec/compal/ene932
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# 60/64 KBC
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device pnp ff.1 on end # dummy address
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end
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end
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end
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device pci 14.4 on end # PCI 0x4384 # PCI-b conflict with GPIO.
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chip drivers/generic/generic #dimm 1
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device pci 14.5 on end # USB 2
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device i2c 51 on end # 7-bit SPD address
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device pci 14.6 off end # Gec
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end
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device pci 14.7 on end # SD
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end # SM
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device pci 15.0 off end # PCIe 0
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device pci 14.2 on end # HDA 0x4383
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device pci 15.1 off end # PCIe 1
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device pci 14.3 on # LPC 0x439d
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device pci 15.2 off end # PCIe 2
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chip ec/compal/ene932
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device pci 15.3 off end # PCIe 3
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# 60/64 KBC
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end #chip southbridge/amd/agesa/hudson
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device pnp ff.1 on end # dummy address
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end
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end
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device pci 14.4 on end # PCI 0x4384 # PCI-b conflict with GPIO.
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device pci 14.5 on end # USB 2
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device pci 14.6 off end # Gec
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device pci 14.7 on end # SD
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device pci 15.0 off end # PCIe 0
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device pci 15.1 off end # PCIe 1
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device pci 15.2 off end # PCIe 2
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device pci 15.3 off end # PCIe 3
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end #chip southbridge/amd/agesa/hudson
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chip northbridge/amd/agesa/family15tn
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device pci 18.0 on end
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device pci 18.0 on end
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device pci 18.1 on end
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device pci 18.1 on end
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device pci 18.2 on end
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device pci 18.2 on end
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@ -79,7 +78,7 @@ chip northbridge/amd/agesa/family15tn/root_complex
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{ {0xA0, 0x00}, {0xA2, 0x00}, }, // socket 0 - Channel 0 & 1 - 8-bit SPD addresses
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{ {0xA0, 0x00}, {0xA2, 0x00}, }, // socket 0 - Channel 0 & 1 - 8-bit SPD addresses
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{ {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 - 8-bit SPD addresses
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{ {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 - 8-bit SPD addresses
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}"
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}"
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end
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end #chip northbridge/amd/agesa/family15tn # CPU side of HT root complex
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end #domain
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end #domain
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end #chip northbridge/amd/agesa/family15tn/root_complex
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end #chip northbridge/amd/agesa/family15tn/root_complex
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@ -22,55 +22,54 @@ chip northbridge/amd/agesa/family15tn/root_complex
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device domain 0 on
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device domain 0 on
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subsystemid 0x1022 0x1410 inherit
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subsystemid 0x1022 0x1410 inherit
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chip northbridge/amd/agesa/family15tn # CPU side of HT root complex
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chip northbridge/amd/agesa/family15tn
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device pci 0.0 on end # Root Complex
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device pci 0.2 on end # IOMMU
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device pci 1.0 on end # Internal Graphics P2P bridge 0x99XX
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device pci 1.1 on end # Internal Multimedia
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device pci 2.0 off end
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device pci 3.0 off end
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||||||
|
device pci 4.0 on end # PCIE MINI0
|
||||||
|
device pci 5.0 on end # PCIE MINI1
|
||||||
|
device pci 6.0 off end #
|
||||||
|
device pci 7.0 off end #
|
||||||
|
device pci 8.0 off end # NB/SB Link P2P bridge ?
|
||||||
|
device pci 9.0 off end #
|
||||||
|
end #chip northbridge/amd/agesa/family15tn
|
||||||
|
|
||||||
chip northbridge/amd/agesa/family15tn # PCI side of HT root complex
|
chip southbridge/amd/agesa/hudson
|
||||||
device pci 0.0 on end # Root Complex
|
device pci 10.0 on end # FCH USB XHCI Controller HC0
|
||||||
device pci 0.2 on end # IOMMU
|
device pci 11.0 on end # FCH SATA Controller [AHCI mode]
|
||||||
device pci 1.0 on end # Internal Graphics P2P bridge 0x99XX
|
device pci 12.0 on end # FCH USB OHCI Controller
|
||||||
device pci 1.1 on end # Internal Multimedia
|
device pci 12.2 on end # FCH USB EHCI Controller
|
||||||
device pci 2.0 off end
|
device pci 13.0 on end # FCH USB OHCI Controller
|
||||||
device pci 3.0 off end
|
device pci 13.2 on end # FCH USB EHCI Controller
|
||||||
device pci 4.0 on end # PCIE MINI0
|
device pci 14.0 on # SMBUS
|
||||||
device pci 5.0 on end # PCIE MINI1
|
chip drivers/generic/generic #dimm 0
|
||||||
device pci 6.0 off end #
|
device i2c 50 on end # 7-bit SPD address
|
||||||
device pci 7.0 off end #
|
|
||||||
device pci 8.0 off end # NB/SB Link P2P bridge ?
|
|
||||||
device pci 9.0 off end #
|
|
||||||
end #chip northbridge/amd/agesa/family15tn # PCI side of HT root complex
|
|
||||||
|
|
||||||
chip southbridge/amd/agesa/hudson # it is under NB/SB Link, but on the same pci bus
|
|
||||||
device pci 10.0 on end # FCH USB XHCI Controller HC0
|
|
||||||
device pci 11.0 on end # FCH SATA Controller [AHCI mode]
|
|
||||||
device pci 12.0 on end # FCH USB OHCI Controller
|
|
||||||
device pci 12.2 on end # FCH USB EHCI Controller
|
|
||||||
device pci 13.0 on end # FCH USB OHCI Controller
|
|
||||||
device pci 13.2 on end # FCH USB EHCI Controller
|
|
||||||
device pci 14.0 on # SMBUS
|
|
||||||
chip drivers/generic/generic #dimm 0
|
|
||||||
device i2c 50 on end # 7-bit SPD address
|
|
||||||
end
|
|
||||||
chip drivers/generic/generic #dimm 1
|
|
||||||
device i2c 51 on end # 7-bit SPD address
|
|
||||||
end
|
|
||||||
end # SM
|
|
||||||
device pci 14.2 on end # FCH Azalia Controller
|
|
||||||
device pci 14.3 on # FCH LPC Bridge [1022:780e]
|
|
||||||
chip ec/compal/ene932
|
|
||||||
# 60/64 KBC
|
|
||||||
device pnp ff.1 on end # dummy address
|
|
||||||
end
|
|
||||||
end
|
end
|
||||||
device pci 14.4 on end # FCH PCI Bridge [1022:780f]
|
chip drivers/generic/generic #dimm 1
|
||||||
device pci 14.5 off end # USB 2
|
device i2c 51 on end # 7-bit SPD address
|
||||||
device pci 14.6 off end # Gec
|
end
|
||||||
device pci 14.7 off end # SD
|
end # SM
|
||||||
device pci 15.0 off end # PCIe 0
|
device pci 14.2 on end # FCH Azalia Controller
|
||||||
device pci 15.1 off end # PCIe 1
|
device pci 14.3 on # FCH LPC Bridge [1022:780e]
|
||||||
device pci 15.2 off end # PCIe 2
|
chip ec/compal/ene932
|
||||||
device pci 15.3 off end # PCIe 3
|
# 60/64 KBC
|
||||||
end #chip southbridge/amd/agesa/hudson
|
device pnp ff.1 on end # dummy address
|
||||||
|
end
|
||||||
|
end
|
||||||
|
device pci 14.4 on end # FCH PCI Bridge [1022:780f]
|
||||||
|
device pci 14.5 off end # USB 2
|
||||||
|
device pci 14.6 off end # Gec
|
||||||
|
device pci 14.7 off end # SD
|
||||||
|
device pci 15.0 off end # PCIe 0
|
||||||
|
device pci 15.1 off end # PCIe 1
|
||||||
|
device pci 15.2 off end # PCIe 2
|
||||||
|
device pci 15.3 off end # PCIe 3
|
||||||
|
end #chip southbridge/amd/agesa/hudson
|
||||||
|
|
||||||
|
chip northbridge/amd/agesa/family15tn
|
||||||
device pci 18.0 on end
|
device pci 18.0 on end
|
||||||
device pci 18.1 on end
|
device pci 18.1 on end
|
||||||
device pci 18.2 on end
|
device pci 18.2 on end
|
||||||
|
|
@ -83,7 +82,7 @@ chip northbridge/amd/agesa/family15tn/root_complex
|
||||||
{ {0xA0, 0x00}, {0xA2, 0x00}, }, // socket 0 - Channel 0 & 1 - 8-bit SPD addresses
|
{ {0xA0, 0x00}, {0xA2, 0x00}, }, // socket 0 - Channel 0 & 1 - 8-bit SPD addresses
|
||||||
{ {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 - 8-bit SPD addresses
|
{ {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 - 8-bit SPD addresses
|
||||||
}"
|
}"
|
||||||
|
end
|
||||||
|
|
||||||
end #chip northbridge/amd/agesa/family15tn # CPU side of HT root complex
|
|
||||||
end #domain
|
end #domain
|
||||||
end #chip northbridge/amd/agesa/family15tn/root_complex
|
end #chip northbridge/amd/agesa/family15tn/root_complex
|
||||||
|
|
|
||||||
|
|
@ -23,142 +23,141 @@ chip northbridge/amd/agesa/family15tn/root_complex
|
||||||
|
|
||||||
device domain 0 on
|
device domain 0 on
|
||||||
subsystemid 0x1022 0x1410 inherit
|
subsystemid 0x1022 0x1410 inherit
|
||||||
chip northbridge/amd/agesa/family15tn # CPU side of HT root complex
|
chip northbridge/amd/agesa/family15tn
|
||||||
|
device pci 0.0 on end # Root Complex
|
||||||
|
device pci 0.2 on end # IOMMU
|
||||||
|
device pci 1.0 on end # Internal Graphics P2P bridge 0x990e
|
||||||
|
device pci 1.1 on end # Internal Multimedia
|
||||||
|
device pci 2.0 on end # PCIe x16
|
||||||
|
device pci 3.0 off end # -
|
||||||
|
device pci 4.0 on end # PCIE Realtek LAN
|
||||||
|
device pci 5.0 on end # PCIE x1 (1)
|
||||||
|
device pci 6.0 on end # PCIE x1 (2)
|
||||||
|
device pci 7.0 off end # LAN
|
||||||
|
device pci 8.0 off end # NB/SB Link P2P bridge
|
||||||
|
end #chip northbridge/amd/agesa/family15tn
|
||||||
|
|
||||||
chip northbridge/amd/agesa/family15tn # PCI side of HT root complex
|
chip southbridge/amd/agesa/hudson
|
||||||
device pci 0.0 on end # Root Complex
|
device pci 10.0 on end # USB XHCI
|
||||||
device pci 0.2 on end # IOMMU
|
device pci 10.1 on end # USB XHCI
|
||||||
device pci 1.0 on end # Internal Graphics P2P bridge 0x990e
|
device pci 11.0 on end # SATA
|
||||||
device pci 1.1 on end # Internal Multimedia
|
device pci 12.0 on end # USB OHCI
|
||||||
device pci 2.0 on end # PCIe x16
|
device pci 12.2 on end # USB EHCI
|
||||||
device pci 3.0 off end # -
|
device pci 13.0 on end # USB OHCI
|
||||||
device pci 4.0 on end # PCIE Realtek LAN
|
device pci 13.2 on end # USB EHCI
|
||||||
device pci 5.0 on end # PCIE x1 (1)
|
device pci 14.0 on # SMBUS
|
||||||
device pci 6.0 on end # PCIE x1 (2)
|
chip drivers/generic/generic #dimm 0
|
||||||
device pci 7.0 off end # LAN
|
device i2c 50 on end # 7-bit SPD address
|
||||||
device pci 8.0 off end # NB/SB Link P2P bridge
|
end
|
||||||
end #chip northbridge/amd/agesa/family15tn # PCI side of HT root complex
|
chip drivers/generic/generic #dimm 1
|
||||||
|
device i2c 51 on end # 7-bit SPD address
|
||||||
|
end
|
||||||
|
end # SM
|
||||||
|
device pci 14.1 off end # IDE 0x439c
|
||||||
|
device pci 14.2 on end # Azalia (Audio)
|
||||||
|
device pci 14.3 on # LPC 0x439d
|
||||||
|
chip superio/fintek/f71869ad
|
||||||
|
register "multi_function_register_1" = "0x01"
|
||||||
|
register "multi_function_register_2" = "0x0f"
|
||||||
|
register "multi_function_register_3" = "0x2f"
|
||||||
|
register "multi_function_register_4" = "0x04"
|
||||||
|
register "multi_function_register_5" = "0x3e"
|
||||||
|
|
||||||
chip southbridge/amd/agesa/hudson # it is under NB/SB Link, but on the same pci bus
|
# HWM configuration registers
|
||||||
device pci 10.0 on end # USB XHCI
|
register "hwm_smbus_address" = "0x98"
|
||||||
device pci 10.1 on end # USB XHCI
|
register "hwm_smbus_control_reg" = "0x02"
|
||||||
device pci 11.0 on end # SATA
|
register "hwm_fan_type_sel_reg" = "0x00"
|
||||||
device pci 12.0 on end # USB OHCI
|
register "hwm_fan1_temp_adj_rate_reg" = "0x33"
|
||||||
device pci 12.2 on end # USB EHCI
|
register "hwm_fan_mode_sel_reg" = "0x07"
|
||||||
device pci 13.0 on end # USB OHCI
|
register "hwm_fan1_idx_rpm_mode" = "0x0e"
|
||||||
device pci 13.2 on end # USB EHCI
|
register "hwm_fan1_seg1_speed_count" = "0xff"
|
||||||
device pci 14.0 on # SMBUS
|
register "hwm_fan1_seg2_speed_count" = "0x0e"
|
||||||
chip drivers/generic/generic #dimm 0
|
register "hwm_fan1_seg3_speed_count" = "0x07"
|
||||||
device i2c 50 on end # 7-bit SPD address
|
register "hwm_fan1_temp_map_sel" = "0x8c"
|
||||||
|
register "hwm_temp_sensor_type" = "0x08"
|
||||||
|
|
||||||
|
device pnp 4e.00 off end
|
||||||
|
device pnp 4e.01 on # COM1
|
||||||
|
io 0x60 = 0x3f8
|
||||||
|
irq 0x70 = 4
|
||||||
end
|
end
|
||||||
chip drivers/generic/generic #dimm 1
|
device pnp 4e.02 off # COM2 (Level converter not populated, but may be usable?)
|
||||||
device i2c 51 on end # 7-bit SPD address
|
io 0x60 = 0x2f8
|
||||||
|
irq 0x70 = 3
|
||||||
end
|
end
|
||||||
end # SM
|
device pnp 4e.03 on # Parallel Port
|
||||||
device pci 14.1 off end # IDE 0x439c
|
io 0x60 = 0x378
|
||||||
device pci 14.2 on end # Azalia (Audio)
|
irq 0x70 = 5
|
||||||
device pci 14.3 on # LPC 0x439d
|
drq 0x74 = 3
|
||||||
chip superio/fintek/f71869ad
|
irq 0xf0 = 0x44 # PRT Mode Select Register
|
||||||
register "multi_function_register_1" = "0x01"
|
end
|
||||||
register "multi_function_register_2" = "0x0f"
|
device pnp 4e.04 on # Hardware Monitor
|
||||||
register "multi_function_register_3" = "0x2f"
|
io 0x60 = 0x225 # Fintek datasheet says 0x295.
|
||||||
register "multi_function_register_4" = "0x04"
|
irq 0x70 = 0
|
||||||
register "multi_function_register_5" = "0x3e"
|
end
|
||||||
|
device pnp 4e.05 on # KBC
|
||||||
|
io 0x60 = 0x060
|
||||||
|
irq 0x70 = 1 # Keyboard IRQ
|
||||||
|
irq 0x72 = 12 # Mouse IRQ
|
||||||
|
end
|
||||||
|
device pnp 4e.06 on # GPIO
|
||||||
|
# ! GPIO config is disabled because the code in romstage.c
|
||||||
|
# ! has already taken care of it
|
||||||
|
#io 0x60 = 0xa00
|
||||||
|
#irq 0xe0 = 0x04 # GPIO1 output
|
||||||
|
#irq 0xe1 = 0xff # GPIO1 output data
|
||||||
|
#irq 0xe3 = 0x04 # GPIO1 drive enable
|
||||||
|
#irq 0xe4 = 0x00 # GPIO1 PME enable
|
||||||
|
#irq 0xe5 = 0x00 # GPIO1 input detect select
|
||||||
|
#irq 0xe6 = 0x40 # GPIO1 event status
|
||||||
|
|
||||||
# HWM configuration registers
|
#irq 0xd0 = 0x00 # GPIO2 output
|
||||||
register "hwm_smbus_address" = "0x98"
|
#irq 0xd1 = 0xff # GPIO2 output data
|
||||||
register "hwm_smbus_control_reg" = "0x02"
|
#irq 0xd3 = 0x00 # GPIO2 drive enable
|
||||||
register "hwm_fan_type_sel_reg" = "0x00"
|
|
||||||
register "hwm_fan1_temp_adj_rate_reg" = "0x33"
|
|
||||||
register "hwm_fan_mode_sel_reg" = "0x07"
|
|
||||||
register "hwm_fan1_idx_rpm_mode" = "0x0e"
|
|
||||||
register "hwm_fan1_seg1_speed_count" = "0xff"
|
|
||||||
register "hwm_fan1_seg2_speed_count" = "0x0e"
|
|
||||||
register "hwm_fan1_seg3_speed_count" = "0x07"
|
|
||||||
register "hwm_fan1_temp_map_sel" = "0x8c"
|
|
||||||
register "hwm_temp_sensor_type" = "0x08"
|
|
||||||
|
|
||||||
device pnp 4e.00 off end
|
#irq 0xc0 = 0x00 # GPIO3 output
|
||||||
device pnp 4e.01 on # COM1
|
#irq 0xc1 = 0xff # GPIO3 output data
|
||||||
io 0x60 = 0x3f8
|
|
||||||
irq 0x70 = 4
|
|
||||||
end
|
|
||||||
device pnp 4e.02 off # COM2 (Level converter not populated, but may be usable?)
|
|
||||||
io 0x60 = 0x2f8
|
|
||||||
irq 0x70 = 3
|
|
||||||
end
|
|
||||||
device pnp 4e.03 on # Parallel Port
|
|
||||||
io 0x60 = 0x378
|
|
||||||
irq 0x70 = 5
|
|
||||||
drq 0x74 = 3
|
|
||||||
irq 0xf0 = 0x44 # PRT Mode Select Register
|
|
||||||
end
|
|
||||||
device pnp 4e.04 on # Hardware Monitor
|
|
||||||
io 0x60 = 0x225 # Fintek datasheet says 0x295.
|
|
||||||
irq 0x70 = 0
|
|
||||||
end
|
|
||||||
device pnp 4e.05 on # KBC
|
|
||||||
io 0x60 = 0x060
|
|
||||||
irq 0x70 = 1 # Keyboard IRQ
|
|
||||||
irq 0x72 = 12 # Mouse IRQ
|
|
||||||
end
|
|
||||||
device pnp 4e.06 on # GPIO
|
|
||||||
# ! GPIO config is disabled because the code in romstage.c
|
|
||||||
# ! has already taken care of it
|
|
||||||
#io 0x60 = 0xa00
|
|
||||||
#irq 0xe0 = 0x04 # GPIO1 output
|
|
||||||
#irq 0xe1 = 0xff # GPIO1 output data
|
|
||||||
#irq 0xe3 = 0x04 # GPIO1 drive enable
|
|
||||||
#irq 0xe4 = 0x00 # GPIO1 PME enable
|
|
||||||
#irq 0xe5 = 0x00 # GPIO1 input detect select
|
|
||||||
#irq 0xe6 = 0x40 # GPIO1 event status
|
|
||||||
|
|
||||||
#irq 0xd0 = 0x00 # GPIO2 output
|
#irq 0xb0 = 0x04 # GPIO4 output
|
||||||
#irq 0xd1 = 0xff # GPIO2 output data
|
#irq 0xb1 = 0x04 # GPIO4 output data
|
||||||
#irq 0xd3 = 0x00 # GPIO2 drive enable
|
#irq 0xb3 = 0x04 # GPIO4 drive enable
|
||||||
|
#irq 0xb4 = 0x00 # GPIO4 PME enable
|
||||||
|
#irq 0xb5 = 0x00 # GPIO4 input detect select
|
||||||
|
#irq 0xb6 = 0x00 # GPIO4 event status
|
||||||
|
|
||||||
#irq 0xc0 = 0x00 # GPIO3 output
|
#irq 0xa0 = 0x00 # GPIO5 output
|
||||||
#irq 0xc1 = 0xff # GPIO3 output data
|
#irq 0xa1 = 0x1f # GPIO5 output data
|
||||||
|
#irq 0xa3 = 0x00 # GPIO5 drive enable
|
||||||
|
#irq 0xa4 = 0x00 # GPIO5 PME enable
|
||||||
|
#irq 0xa5 = 0xff # GPIO5 input detect select
|
||||||
|
#irq 0xa6 = 0xe0 # GPIO5 event status
|
||||||
|
|
||||||
#irq 0xb0 = 0x04 # GPIO4 output
|
#irq 0x90 = 0x00 # GPIO6 output
|
||||||
#irq 0xb1 = 0x04 # GPIO4 output data
|
#irq 0x91 = 0xff # GPIO6 output data
|
||||||
#irq 0xb3 = 0x04 # GPIO4 drive enable
|
#irq 0x93 = 0x00 # GPIO6 drive enable
|
||||||
#irq 0xb4 = 0x00 # GPIO4 PME enable
|
|
||||||
#irq 0xb5 = 0x00 # GPIO4 input detect select
|
|
||||||
#irq 0xb6 = 0x00 # GPIO4 event status
|
|
||||||
|
|
||||||
#irq 0xa0 = 0x00 # GPIO5 output
|
#irq 0x80 = 0x00 # GPIO7 output
|
||||||
#irq 0xa1 = 0x1f # GPIO5 output data
|
#irq 0x81 = 0xff # GPIO7 output data
|
||||||
#irq 0xa3 = 0x00 # GPIO5 drive enable
|
#irq 0x83 = 0x00 # GPIO7 drive enable
|
||||||
#irq 0xa4 = 0x00 # GPIO5 PME enable
|
end
|
||||||
#irq 0xa5 = 0xff # GPIO5 input detect select
|
|
||||||
#irq 0xa6 = 0xe0 # GPIO5 event status
|
|
||||||
|
|
||||||
#irq 0x90 = 0x00 # GPIO6 output
|
device pnp 4e.07 on end # WDT
|
||||||
#irq 0x91 = 0xff # GPIO6 output data
|
device pnp 4e.08 off end # CIR
|
||||||
#irq 0x93 = 0x00 # GPIO6 drive enable
|
device pnp 4e.0a on end # PME
|
||||||
|
end # f71869ad
|
||||||
|
end #device pci 14.3 # LPC
|
||||||
|
device pci 14.4 on end # PCI 0x4384 (PCI slot on board)
|
||||||
|
device pci 14.5 on end # USB OHCI
|
||||||
|
device pci 14.6 off end # Gec
|
||||||
|
device pci 14.7 off end # SD
|
||||||
|
device pci 15.0 off end # unused
|
||||||
|
device pci 15.1 off end # unused
|
||||||
|
device pci 15.2 off end # unused
|
||||||
|
device pci 15.3 off end # unused
|
||||||
|
|
||||||
#irq 0x80 = 0x00 # GPIO7 output
|
end #chip southbridge/amd/agesa/hudson
|
||||||
#irq 0x81 = 0xff # GPIO7 output data
|
|
||||||
#irq 0x83 = 0x00 # GPIO7 drive enable
|
|
||||||
end
|
|
||||||
|
|
||||||
device pnp 4e.07 on end # WDT
|
|
||||||
device pnp 4e.08 off end # CIR
|
|
||||||
device pnp 4e.0a on end # PME
|
|
||||||
end # f71869ad
|
|
||||||
end #device pci 14.3 # LPC
|
|
||||||
device pci 14.4 on end # PCI 0x4384 (PCI slot on board)
|
|
||||||
device pci 14.5 on end # USB OHCI
|
|
||||||
device pci 14.6 off end # Gec
|
|
||||||
device pci 14.7 off end # SD
|
|
||||||
device pci 15.0 off end # unused
|
|
||||||
device pci 15.1 off end # unused
|
|
||||||
device pci 15.2 off end # unused
|
|
||||||
device pci 15.3 off end # unused
|
|
||||||
|
|
||||||
end #chip southbridge/amd/agesa/hudson
|
|
||||||
|
|
||||||
|
chip northbridge/amd/agesa/family15tn
|
||||||
device pci 18.0 on end
|
device pci 18.0 on end
|
||||||
device pci 18.1 on end
|
device pci 18.1 on end
|
||||||
device pci 18.2 on end
|
device pci 18.2 on end
|
||||||
|
|
@ -171,7 +170,7 @@ chip northbridge/amd/agesa/family15tn/root_complex
|
||||||
{ {0xA0, 0xA4}, {0xA2, 0xA6}, }, // socket 0 - Channel 0 & 1 - 8-bit SPD addresses
|
{ {0xA0, 0xA4}, {0xA2, 0xA6}, }, // socket 0 - Channel 0 & 1 - 8-bit SPD addresses
|
||||||
{ {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 - 8-bit SPD addresses
|
{ {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 - 8-bit SPD addresses
|
||||||
}"
|
}"
|
||||||
|
end
|
||||||
|
|
||||||
end #chip northbridge/amd/agesa/family15tn # CPU side of HT root complex
|
|
||||||
end #domain
|
end #domain
|
||||||
end #chip northbridge/amd/agesa/family15tn/root_complex
|
end #chip northbridge/amd/agesa/family15tn/root_complex
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue