soc/apollolake: Enable/disable Audio clk and power gate in devicetree.cb

BUG=chrome-os-partner:56034

Change-Id: Id88d262b32dea468536575117fc34d52076a3096
Signed-off-by: Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri@intel.com>
Reviewed-on: https://review.coreboot.org/16423
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Venkateswarlu Vinjamuri 2016-09-02 16:04:27 -07:00 committed by Martin Roth
parent 8ba2010d12
commit 88df48c555
2 changed files with 14 additions and 0 deletions

View File

@ -400,6 +400,13 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd)
/* Disable FSP from locking access to the RTC NVRAM */
silconfig->RtcLock = 0;
/* Enable Audio clk gate and power gate */
silconfig->HDAudioClkGate = cfg->hdaudio_clk_gate_enable;
silconfig->HDAudioPwrGate = cfg->hdaudio_pwr_gate_enable;
/* Bios config lockdown Audio clk and power gate */
silconfig->BiosCfgLockDown = cfg->hdaudio_bios_config_lockdown;
}
struct chip_operations soc_intel_apollolake_ops = {

View File

@ -107,6 +107,13 @@ struct soc_intel_apollolake_config {
/* Enable DPTF support */
int dptf_enable;
/* Configure Audio clk gate and power gate
* IOSF-SB port ID 92 offset 0x530 [5] and [3]
*/
uint8_t hdaudio_clk_gate_enable;
uint8_t hdaudio_pwr_gate_enable;
uint8_t hdaudio_bios_config_lockdown;
/* SLP S3 minimum assertion width. */
int slp_s3_assertion_width_usecs;
};