GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

sb/intel/i82801bx: Get rid of device_t 

Use of device_t has been abandoned in ramstage.

Change-Id: I661b2435d9f0306b246a3e89aac24eb30c959085
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26253
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
This commit is contained in:
Elyes HAOUAS 2018-05-13 13:30:59 +02:00 committed by Patrick Georgi
parent 152f1c918f
commit 892e9f6030
5 changed files with 10 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/southbridge/intel/i82801bx/i82801bx.c
View File

@ -21,10 +21,10 @@
#include <device/pci.h>
#include "i82801bx.h"
void i82801bx_enable(device_t dev)
void i82801bx_enable(struct device *dev)
{
u16 reg16, index;
device_t lpc_dev;
struct device *lpc_dev;
/* Search for the 82801BA/BAM LPC device (D31:F0) on PCI bus 0. */
lpc_dev = dev_find_slot(0, PCI_DEVFN(0x1f, 0));

2
src/southbridge/intel/i82801bx/i82801bx.h
View File

@ -19,7 +19,7 @@
#if !defined(__PRE_RAM__)
#include "chip.h"
extern void i82801bx_enable(device_t dev);
extern void i82801bx_enable(struct device *dev);
#endif
#if defined(__PRE_RAM__)

10
src/southbridge/intel/i82801bx/lpc.c
View File

@ -119,7 +119,7 @@ static void i82801bx_enable_serial_irqs(struct device *dev)
/* TODO: Explain/#define the real meaning of these magic numbers. */
}
static void i82801bx_pirq_init(device_t dev, uint16_t ich_model)
static void i82801bx_pirq_init(struct device *dev, uint16_t ich_model)
{
u8 reg8;
config_t *config = dev->chip_info;
@ -150,7 +150,7 @@ static void i82801bx_pirq_init(device_t dev, uint16_t ich_model)
pci_write_config8(dev, PIRQH_ROUT, reg8);
}
static void i82801bx_power_options(device_t dev)
static void i82801bx_power_options(struct device *dev)
{
uint8_t byte;
int pwr_on = -1;
@ -180,7 +180,7 @@ static void i82801bx_power_options(device_t dev)
}
}
static void gpio_init(device_t dev)
static void gpio_init(struct device *dev)
{
/* Set the value for GPIO base address register and enable GPIO. */
pci_write_config32(dev, GPIO_BASE, (GPIO_BASE_ADDR | 1));
@ -222,7 +222,7 @@ static void i82801bx_lpc_route_dma(struct device *dev, uint8_t mask)
pci_write_config16(dev, PCI_DMA_CFG, reg16);
}
static void i82801bx_lpc_decode_en(device_t dev, uint16_t ich_model)
static void i82801bx_lpc_decode_en(struct device *dev, uint16_t ich_model)
{
/* Decode 0x3F8-0x3FF (COM1) for COMA port, 0x2F8-0x2FF (COM2) for COMB.
* LPT decode defaults to 0x378-0x37F and 0x778-0x77F.
@ -269,7 +269,7 @@ static void lpc_init(struct device *dev)
i82801bx_lpc_decode_en(dev, ich_model);
}
static void i82801bx_lpc_read_resources(device_t dev)
static void i82801bx_lpc_read_resources(struct device *dev)
{
struct resource *res;

2
src/southbridge/intel/i82801bx/smbus.c
View File

@ -22,7 +22,7 @@
#include <southbridge/intel/common/smbus.h>
#include "i82801bx.h"
static int lsmbus_read_byte(device_t dev, u8 address)
static int lsmbus_read_byte(struct device *dev, u8 address)
{
u16 device;
struct resource *res;

2
src/southbridge/intel/i82801bx/watchdog.c
View File

@ -24,7 +24,7 @@
void watchdog_off(void)
{
device_t dev;
struct device *dev;
unsigned long value, base;
/* Turn off the ICH5 watchdog. */