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soc/intel/jasperlake: Select DISPLAY_FSP_VERSION_INFO_2 

Select DISPLAY_FSP_VERSION_INFO_2 for Jasper Lake soc.

BUG=b:153038236
BRANCH=None
TEST=Verify JSLRVP build with all the patch in relation chain
and verify the version output prints no junk data observed.
couple of lines from logs are as below.

Display FSP Version Info HOB
Reference Code - CPU = 8.7.16.10
uCode Version = 0.0.0.1

Change-Id: If68b704c4304357b0046a510545fc213d7ed5887
Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45907
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Ronak Kanabar 2020-10-01 20:10:47 +05:30 committed by Patrick Georgi
parent 5cb24d4522
commit 89316b6c6f
1 changed files with 1 additions and 1 deletions
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2
src/soc/intel/jasperlake/Kconfig
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@ -64,7 +64,7 @@ config CPU_SPECIFIC_OPTIONS
select TSC_MONOTONIC_TIMER
select UDELAY_TSC
select UDK_202005_BINDING
select DISPLAY_FSP_VERSION_INFO
select DISPLAY_FSP_VERSION_INFO_2
select HECI_DISABLE_USING_SMM
config DCACHE_RAM_BASE