mb/google/rex: Enable CNVi BT Core

This patch override `CnviBtCore` FSP UPD.

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I90c9b360969aada0b0e031d62b48476fac5cee0e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66208
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
This commit is contained in:
Subrata Banik 2022-07-27 17:58:02 +00:00 committed by Paul Fagerburg
parent ff424fbe6b
commit 8a039031dd
1 changed files with 3 additions and 0 deletions

View File

@ -11,6 +11,9 @@ chip soc/intel/meteorlake
# EC memory map range is 0x900-0x9ff # EC memory map range is 0x900-0x9ff
register "gen3_dec" = "0x00fc0901" register "gen3_dec" = "0x00fc0901"
# Enable CNVi BT
register "cnvi_bt_core" = "true"
register "serial_io_uart_mode" = "{ register "serial_io_uart_mode" = "{
[PchSerialIoIndexUART0] = PchSerialIoPci, [PchSerialIoIndexUART0] = PchSerialIoPci,
[PchSerialIoIndexUART1] = PchSerialIoDisabled, [PchSerialIoIndexUART1] = PchSerialIoDisabled,