src: Remove unneeded include <cbmem.h>

Change-Id: I89e03b6def5c78415bf73baba55941953a70d8de
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/29302
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/arch/arm/armv7/mmu.c

@@ -33,7 +33,6 @@
 #include <stdint.h>
 #include <symbols.h>
 
-#include <cbmem.h>
 #include <console/console.h>
 
 #include <arch/cache.h>

src/arch/arm64/arm_tf.c

@@ -20,7 +20,6 @@
 #include <arm_tf.h>
 #include <assert.h>
 #include <cbfs.h>
-#include <cbmem.h>
 #include <program_loading.h>
 
 /*

src/arch/arm64/boot.c

@@ -18,7 +18,6 @@
 #include <arch/stages.h>
 #include <arch/transition.h>
 #include <arm_tf.h>
-#include <cbmem.h>
 #include <program_loading.h>
 #include <rules.h>
 #include <string.h>

src/cpu/allwinner/a10/cpu.c

@@ -18,7 +18,6 @@
  */
 
 #include <device/device.h>
-#include <cbmem.h>
 #include <symbols.h>
 
 static void cpu_enable_resources(struct device *dev)

src/cpu/amd/car/post_cache_as_ram.c

@@ -26,7 +26,6 @@
 #include <cpu/amd/msr.h>
 #include <arch/acpi.h>
 #include <romstage_handoff.h>
-#include <cbmem.h>
 
 #include "cpu/amd/car/disable_cache_as_ram.c"
 

src/drivers/amd/agesa/state_machine.c

@@ -21,7 +21,6 @@
 #include <arch/cpu.h>
 #include <bootstate.h>
 #include <cbfs.h>
-#include <cbmem.h>
 
 #include <northbridge/amd/agesa/state_machine.h>
 #include <northbridge/amd/agesa/agesa_helper.h>

src/drivers/intel/fsp1_1/hob.c

@@ -17,7 +17,6 @@
 #include <arch/early_variables.h>
 #include <arch/hlt.h>
 #include <bootstate.h>
-#include <cbmem.h>
 #include <console/console.h>
 #include <fsp/util.h>
 #include <ip_checksum.h>

src/drivers/intel/fsp1_1/ramstage.c

@@ -16,7 +16,6 @@
 
 #include <bootmode.h>
 #include <arch/acpi.h>
-#include <cbmem.h>
 #include <console/console.h>
 #include <fsp/memmap.h>
 #include <fsp/ramstage.h>

src/mainboard/google/slippy/acpi_tables.c

@@ -15,7 +15,6 @@
 
 #include <types.h>
 #include <string.h>
-#include <cbmem.h>
 #include <arch/acpi.h>
 #include <arch/ioapic.h>
 #include <arch/acpigen.h>

src/mainboard/via/epia-m850/romstage.c

@@ -27,6 +27,7 @@
 #include <cpu/x86/bist.h>
 #include <string.h>
 #include <timestamp.h>
+#include <cbmem.h>
 
 #include <northbridge/via/vx900/early_vx900.h>
 #include <northbridge/via/vx900/raminit.h>

src/northbridge/amd/agesa/family12/northbridge.c

@@ -26,7 +26,6 @@
 #include <string.h>
 #include <lib.h>
 #include <cpu/cpu.h>
-#include <cbmem.h>
 
 #include <cpu/x86/lapic.h>
 #include <cpu/amd/msr.h>

src/northbridge/amd/agesa/family14/northbridge.c

@@ -26,7 +26,6 @@
 #include <string.h>
 #include <lib.h>
 #include <cpu/cpu.h>
-#include <cbmem.h>
 #include <cpu/x86/lapic.h>
 #include <cpu/amd/msr.h>
 #include <cpu/amd/mtrr.h>

src/northbridge/amd/agesa/family15tn/northbridge.c

@@ -27,7 +27,6 @@
 #include <string.h>
 #include <lib.h>
 #include <cpu/cpu.h>
-#include <cbmem.h>
 #include <AGESA.h>
 #include <cpu/x86/lapic.h>
 #include <cpu/amd/msr.h>

src/northbridge/amd/agesa/family16kb/northbridge.c

@@ -26,7 +26,6 @@
 #include <string.h>
 #include <lib.h>
 #include <cpu/cpu.h>
-#include <cbmem.h>
 #include <cpu/x86/lapic.h>
 #include <cpu/amd/msr.h>
 #include <cpu/amd/mtrr.h>

src/northbridge/amd/pi/00630F01/northbridge.c

@@ -25,7 +25,6 @@
 #include <string.h>
 #include <lib.h>
 #include <cpu/cpu.h>
-#include <cbmem.h>
 #include <Porting.h>
 #include <AGESA.h>
 #include <FieldAccessors.h>

src/northbridge/amd/pi/00660F01/northbridge.c

@@ -25,7 +25,6 @@
 #include <string.h>
 #include <lib.h>
 #include <cpu/cpu.h>
-#include <cbmem.h>
 #include <Porting.h>
 #include <AGESA.h>
 #include <FieldAccessors.h>

src/northbridge/amd/pi/00730F01/northbridge.c

@@ -27,7 +27,6 @@
 #include <string.h>
 #include <lib.h>
 #include <cpu/cpu.h>
-#include <cbmem.h>
 #include <Porting.h>
 #include <AGESA.h>
 #include <FieldAccessors.h>

src/northbridge/intel/e7505/northbridge.c

@@ -20,7 +20,6 @@
 #include <stdlib.h>
 #include <string.h>
 #include "e7505.h"
-#include <cbmem.h>
 #include <arch/acpi.h>
 
 unsigned long acpi_fill_mcfg(unsigned long current)

src/northbridge/intel/e7505/raminit.c

@@ -37,7 +37,6 @@
 #include <assert.h>
 #include <spd.h>
 #include <sdram_mode.h>
-#include <cbmem.h>
 
 #include "raminit.h"
 #include "e7505.h"

src/northbridge/intel/fsp_rangeley/northbridge.c

@@ -27,7 +27,6 @@
 #include <stdlib.h>
 #include <string.h>
 #include <cpu/cpu.h>
-#include <cbmem.h>
 #include "chip.h"
 #include "northbridge.h"
 #include <drivers/intel/fsp1_0/fsp_util.h>

src/northbridge/intel/fsp_sandybridge/northbridge.c

@@ -27,7 +27,6 @@
 #include <stdlib.h>
 #include <string.h>
 #include <cpu/cpu.h>
-#include <cbmem.h>
 #include "chip.h"
 #include "northbridge.h"
 #include <fsp_util.h>

src/northbridge/intel/fsp_sandybridge/raminit.c

@@ -16,7 +16,6 @@
 #include <console/console.h>
 #include <string.h>
 #include <arch/io.h>
-#include <cbmem.h>
 #include <device/pci_def.h>
 #include "raminit.h"
 #include "northbridge.h"

src/northbridge/intel/gm45/acpi.c

@@ -22,7 +22,6 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
-#include <cbmem.h>
 #include "gm45.h"
 
 unsigned long acpi_fill_mcfg(unsigned long current)

src/northbridge/intel/haswell/northbridge.c

@@ -27,7 +27,6 @@
 #include <string.h>
 #include <cpu/x86/smm.h>
 #include <boot/tables.h>
-#include <cbmem.h>
 #include "chip.h"
 #include "haswell.h"
 

src/northbridge/intel/i440bx/northbridge.c

@@ -19,7 +19,6 @@
 #include <device/pci_ids.h>
 #include <stdlib.h>
 #include <string.h>
-#include <cbmem.h>
 #include <cpu/cpu.h>
 #include "northbridge.h"
 #include "i440bx.h"

src/northbridge/intel/i945/acpi.c

@@ -21,7 +21,6 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
-#include <cbmem.h>
 #include "i945.h"
 
 unsigned long acpi_fill_mcfg(unsigned long current)

src/northbridge/intel/i945/raminit.c

@@ -26,7 +26,6 @@
 #include "raminit.h"
 #include "i945.h"
 #include "chip.h"
-#include <cbmem.h>
 #include <device/dram/ddr2.h>
 #include <timestamp.h>
 

src/northbridge/intel/nehalem/northbridge.c

@@ -28,7 +28,6 @@
 #include <stdlib.h>
 #include <string.h>
 #include <cpu/cpu.h>
-#include <cbmem.h>
 #include "chip.h"
 #include "nehalem.h"
 #include <cpu/intel/smm/gen1/smi.h>

src/northbridge/intel/sandybridge/early_init.c

@@ -21,7 +21,6 @@
 #include <arch/acpi.h>
 #include <device/pci_def.h>
 #include <elog.h>
-#include <cbmem.h>
 #include <pc80/mc146818rtc.h>
 #include <romstage_handoff.h>
 #include "sandybridge.h"

src/northbridge/intel/sandybridge/northbridge.c

@@ -27,7 +27,6 @@
 #include <stdlib.h>
 #include <string.h>
 #include <cpu/cpu.h>
-#include <cbmem.h>
 #include "chip.h"
 #include "sandybridge.h"
 #include <cpu/intel/smm/gen1/smi.h>

src/northbridge/intel/x4x/acpi.c

@@ -23,7 +23,6 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
-#include <cbmem.h>
 #include "x4x.h"
 
 unsigned long acpi_fill_mcfg(unsigned long current)

src/northbridge/intel/x4x/early_init.c

@@ -24,7 +24,6 @@
 #endif
 #include <pc80/mc146818rtc.h>
 #include "x4x.h"
-#include <cbmem.h>
 #include <console/console.h>
 #include <halt.h>
 #include <romstage_handoff.h>

src/northbridge/via/vx900/early_vx900.h

@@ -21,7 +21,6 @@
 #include "vx900.h"
 
 #include <arch/io.h>
-#include <cbmem.h>
 #include <stdint.h>
 
 /* North Module devices */

src/northbridge/via/vx900/northbridge.c

@@ -22,7 +22,6 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <cpu/cpu.h>
-#include <cbmem.h>
 #include <cf9_reset.h>
 #include <reset.h>
 #include <string.h>

src/security/vboot/vboot_loader.c

@@ -15,7 +15,6 @@
 
 #include <arch/early_variables.h>
 #include <cbfs.h>
-#include <cbmem.h>
 #include <console/console.h>
 #include <ec/google/chromeec/ec.h>
 #include <rmodule.h>

src/soc/amd/common/block/s3/s3_resume.c

@@ -14,7 +14,6 @@
  * GNU General Public License for more details.
  */
 
-#include <cbmem.h>
 #include <stage_cache.h>
 #include <mrc_cache.h>
 #include <console/console.h>

src/soc/intel/braswell/southcluster.c

@@ -19,7 +19,6 @@
 #include <arch/acpi.h>
 #include <arch/acpigen.h>
 #include <bootstate.h>
-#include <cbmem.h>
 #include "chip.h"
 #include <console/console.h>
 #include <cpu/x86/smm.h>

src/soc/intel/broadwell/romstage/romstage.c

@@ -20,7 +20,6 @@
 #include <arch/early_variables.h>
 #include <bootmode.h>
 #include <console/console.h>
-#include <cbmem.h>
 #include <cpu/x86/mtrr.h>
 #include <elog.h>
 #include <program_loading.h>

src/soc/intel/broadwell/systemagent.c

@@ -24,7 +24,6 @@
 #include <device/pci_ids.h>
 #include <stdlib.h>
 #include <string.h>
-#include <cbmem.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 #include <soc/cpu.h>
 #include <soc/iomap.h>

src/soc/intel/cannonlake/romstage/power_state.c

@@ -16,7 +16,6 @@
 
 #include <arch/early_variables.h>
 #include <arch/io.h>
-#include <cbmem.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <intelblocks/pmclib.h>

src/soc/intel/denverton_ns/chip.c

@@ -18,7 +18,6 @@
 #include <arch/acpi.h>
 #include <bootstate.h>
 #include <cbfs.h>
-#include <cbmem.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>

src/soc/intel/denverton_ns/systemagent.c

@@ -25,7 +25,6 @@
 #include <device/pci_ids.h>
 #include <stdlib.h>
 #include <string.h>
-#include <cbmem.h>
 #include <romstage_handoff.h>
 #include <timer.h>
 

src/soc/intel/fsp_baytrail/southcluster.c

@@ -19,7 +19,6 @@
 #include <stdint.h>
 #include <arch/io.h>
 #include <arch/ioapic.h>
-#include <cbmem.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>

src/soc/intel/icelake/romstage/power_state.c

@@ -15,7 +15,6 @@
 
 #include <arch/early_variables.h>
 #include <arch/io.h>
-#include <cbmem.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <intelblocks/pmclib.h>

src/soc/intel/skylake/romstage/romstage.c

@@ -19,7 +19,6 @@
 #include <arch/stages.h>
 #include <arch/early_variables.h>
 #include <assert.h>
-#include <cbmem.h>
 #include <chip.h>
 #include <console/console.h>
 #include <cpu/x86/mtrr.h>

src/soc/nvidia/tegra124/display.c

@@ -15,7 +15,6 @@
 
 #include <arch/io.h>
 #include <boot/tables.h>
-#include <cbmem.h>
 #include <console/console.h>
 #include <delay.h>
 #include <device/device.h>

src/soc/nvidia/tegra124/sor.c

@@ -18,7 +18,6 @@
 
 #include <arch/io.h>
 #include <boot/tables.h>
-#include <cbmem.h>
 #include <console/console.h>
 #include <cpu/cpu.h>
 #include <delay.h>

src/soc/nvidia/tegra210/soc.c

@@ -18,7 +18,6 @@
 #include <arch/cache.h>
 #include <bootmode.h>
 #include <bootstate.h>
-#include <cbmem.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <soc/nvidia/tegra/dc.h>

src/soc/nvidia/tegra210/sor.c

@@ -25,7 +25,6 @@
 #include <device/device.h>
 #include <string.h>
 #include <boot/tables.h>
-#include <cbmem.h>
 #include <soc/nvidia/tegra/dc.h>
 #include <soc/nvidia/tegra/types.h>
 #include <soc/sor.h>

src/soc/rockchip/rk3288/soc.c

@@ -15,7 +15,6 @@
 
 #include <arch/cache.h>
 #include <bootmode.h>
-#include <cbmem.h>
 #include <console/console.h>
 #include <delay.h>
 #include <device/device.h>

src/soc/samsung/exynos5250/cpu.c

@@ -15,7 +15,6 @@
  */
 
 #include <arch/cache.h>
-#include <cbmem.h>
 #include <console/console.h>
 #include <delay.h>
 #include <device/device.h>

src/soc/samsung/exynos5420/cpu.c

@@ -15,7 +15,6 @@
  */
 
 #include <arch/cache.h>
-#include <cbmem.h>
 #include <console/console.h>
 #include <delay.h>
 #include <device/device.h>

src/southbridge/amd/agesa/hudson/early_setup.c

@@ -21,7 +21,6 @@
 #include <arch/acpi.h>
 #include <console/console.h>
 #include <reset.h>
-#include <cbmem.h>
 #include "hudson.h"
 
 void hudson_pci_port80(void)

src/southbridge/amd/agesa/hudson/hudson.c

@@ -23,7 +23,6 @@
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <cbmem.h>
 #include "hudson.h"
 #include "imc.h"
 #include "smbus.h"

src/southbridge/amd/cimx/sb800/cfg.c

@@ -16,7 +16,6 @@
 #include "SBPLATFORM.h"
 #include "cfg.h"
 #include <OEM.h>
-#include <cbmem.h>
 
 #include <arch/io.h>
 #include <arch/acpi.h>

src/southbridge/amd/cimx/sb800/lpc.c

@@ -20,7 +20,6 @@
 #include <arch/ioapic.h>
 #include "lpc.h"
 #include <arch/io.h>
-#include <cbmem.h>
 
 void lpc_read_resources(struct device *dev)
 {

src/southbridge/amd/pi/hudson/early_setup.c

@@ -22,7 +22,6 @@
 #include <arch/acpi.h>
 #include <console/console.h>
 #include <reset.h>
-#include <cbmem.h>
 #include "hudson.h"
 #include "pci_devs.h"
 #include <Fch/Fch.h>

src/southbridge/amd/pi/hudson/hudson.c

@@ -23,7 +23,6 @@
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <cbmem.h>
 #include "hudson.h"
 #include "smbus.h"
 #include "smi.h"

src/southbridge/amd/sb700/lpc.c

@@ -28,7 +28,6 @@
 #include <pc80/isa-dma.h>
 #include <arch/io.h>
 #include <arch/ioapic.h>
-#include <cbmem.h>
 #include <cpu/amd/powernow.h>
 #include "sb700.h"
 

src/southbridge/intel/bd82x6x/early_pch.c

@@ -15,7 +15,6 @@
 
 #include <string.h>
 #include <arch/io.h>
-#include <cbmem.h>
 #include <arch/cbfs.h>
 #include <ip_checksum.h>
 #include <pc80/mc146818rtc.h>