GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

speed up ecc clear by enable MTRR/Cache first. 

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1483 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Li-Ta Lo 2004-03-26 18:34:48 +00:00
parent 23e2e18960
commit 8cb91dc9f8
2 changed files with 6 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
src/arch/i386/lib/cpu.c
View File

@ -126,15 +126,15 @@ unsigned long cpu_initialize(struct mem_range *mem)
unsigned long processor_id = this_processors_id();
printk_notice("Initializing CPU #%d\n", processor_id);
/* some cpus need a fixup done. This is the hook for doing that. */
cpufixup(mem);
/* Turn on caching if we haven't already */
cache_on(mem);
display_cpuid();
mtrr_check();
/* some cpus need a fixup done. This is the hook for doing that. */
cpufixup(mem);
#if 0
/* now that everything is really up, enable the l2 cache if desired.
* The enable can wait until this point, because linuxbios and it's
@ -142,6 +142,7 @@ unsigned long cpu_initialize(struct mem_range *mem)
*/
configure_l2_cache();
#endif
interrupts_on();
processor_id = this_processors_id();
printk_info("CPU #%d Initialized\n", processor_id);

4
src/cpu/k8/cpufixup.c
View File

@ -134,10 +134,11 @@ static void set_init_ecc_mtrrs(void)
{
msr_t msr;
int i;
disable_cache();
/* First clear all of the msrs to be safe */
for(i = 0; i < MTRR_COUNT; i++) {
for (i = 0; i < MTRR_COUNT; i++) {
msr_t zero;
zero.lo = zero.hi = 0;
wrmsr(MTRRphysBase_MSR(i), zero);
@ -165,7 +166,6 @@ static void set_init_ecc_mtrrs(void)
enable_cache();
}
static void init_ecc_memory(void)
{
unsigned long startk, begink, endk;