soc/intel/alderlake: Skip D3Cold for TBT
Check TBT NVM FW Ready (INFR) bit to skip D3Cold for TBT when device is in disconnected state. Not adhering this recommendation is blocking the S0ix state transition. BUG=b:183670327 TEST=S0ix state transition occurs with TBT disconnected. Change-Id: Ib9b9ceee4393aeba37fdcb4e05d1b279a6ff72d2 Signed-off-by: Sugnan Prabhu S <sugnan.prabhu.s@intel.com> Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51274 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
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@ -555,6 +555,9 @@ Scope (\_SB.PCI0)
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Printf("TDM0 does not exist.")
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} Else {
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If (\_SB.PCI0.TDM0.STAT == 1) {
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If (\_SB.PCI0.TDM0.INFR != 1) {
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Return
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}
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/* DMA0 is not in D3Cold now. */
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\_SB.PCI0.TDM0.D3CE() /* Enable DMA RTD3 */
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@ -610,6 +613,9 @@ Scope (\_SB.PCI0)
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Printf("TDM1 does not exist.")
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} Else {
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If (\_SB.PCI0.TDM1.STAT == 1) {
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If (\_SB.PCI0.TDM1.INFR != 1) {
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Return
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}
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/* DMA1 is not in D3Cold now */
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\_SB.PCI0.TDM1.D3CE() /* Enable DMA RTD3. */
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