soc/intel/common/block: Add Intel common RTC code support
Create Intel Common RTC code. This code currently only contains the code for configuring RTC required in Bootblock phase which has the following programming - * Enable upper 128 bytes of CMOS. Change-Id: Id9dfcdbc300c25f43936d1efb5d6f9d81d3c8453 Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com> Reviewed-on: https://review.coreboot.org/18558 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com> Tested-by: build bot (Jenkins)
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2017 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef SOC_INTEL_COMMON_BLOCK_RTC_H
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#define SOC_INTEL_COMMON_BLOCK_RTC_H
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void enable_rtc_upper_bank(void);
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#endif /* SOC_INTEL_COMMON_BLOCK_RTC_H */
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config SOC_INTEL_COMMON_BLOCK_RTC
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bool
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help
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Intel Processor common RTC support
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bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_RTC) += rtc.c
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2017 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <soc/pcr_ids.h>
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#include <intelblocks/pcr.h>
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#include <intelblocks/rtc.h>
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/* RTC PCR configuration */
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#define PCR_RTC_CONF 0x3400
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#define PCR_RTC_CONF_UCMOS_EN (1 << 2)
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#define PCR_RTC_CONF_LCMOS_LOCK (1 << 3)
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#define PCR_RTC_CONF_UCMOS_LOCK (1 << 4)
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#define PCR_RTC_CONF_RESERVED (1 << 31)
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void enable_rtc_upper_bank(void)
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{
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/* Enable upper 128 bytes of CMOS */
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pcr_or32(PID_RTC, PCR_RTC_CONF, PCR_RTC_CONF_UCMOS_EN);
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}
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